Tatung V32FCBB, Service Manual

Page: 23 / 57

10. Electronic Circuit Description
10.1 Main Board (PWB-0713)
(1) Power supply:
Refer to circuit diagrams sheet 15 of PWB-0713, and Power Module (PB01)..
Power Module (PB01) provides 24V
、
12V
、
5V to Main Board via wire P016A and connector P16
#1~2(Blue wires)
、
#3~4(Yellow wires)
、
#5~7(Red wires).
The Backlight control signal from I16#W10 (Scalar: PW218) is applied to Inverter through P16# 11
(Green wire) on Main Board, CN2#11 and CN3#2 (Blue) on Power Module.
Switching 24V
、
12V on or off is controlled by I16#B10 (Scalar: PW218) and applied to Power
Module (PB01) via P16# 12~13 (White wires) on Main Board, and CN2#12~13 on Power Module.
(2) D-sub Signal:
Refer to circuit diagrams sheet 3 and 10 of PWB-0713.
The analog R.G.B. video input signals are supplied through the PJ4 (15pin D-sub connector), and
these three input signals are approximately 0.7Vpp. R75
、
R76
、
R77 give resistance of 75
Ω
respectively
for impedance matching. These R
、
G
、
B video signals are ac coupled via 0.1uF capacitor C364
、
C365
、
C366 and then fed into ADC port of I28 at pin 33
、
49
、
40 respectively. Then, analog R
、
G
、
B video signals
are converted to the their digital forms in I28. The outputs of digital data, including 8 bits red
、
8 bits
green
、
8 bits blue signals, are assigned at pin119 ~ 125
、
pin 111 ~ 118
、
pin 101 ~ 110 of I28
，
and applied
to INOR
、
INOG
、
INOB of I16 (Scalar
：
PW218).
H.sync.
、
V.sync. are applied to I28 # 79
、
#80 (H.Sync.
、
V.Sync.), and the processed signal taken from
#129
、
#131 are fed into I16 #J3
、
#J1 (INOHS INOVS).
CLK signal is taken from I28 #127 (GCLK) and applied to I16#L4 (INOCLK). The PC-Analog is
designed to have the DDC/2B functions. Communication between the LCD-TV and Computer for DDC is
via PJ4 (D-sub connector ) #15
、
#12 ( SCL
、
SDA signals) . The computer will read out the EDID from the
I13 (EEPROM) and the EDID data is written into the EEPROM in the factory during production.
(3) DVI / HDCP Signal:
Refer to circuit diagrams sheet 5 and 10 of PWB-0713.
The TMDS (Transmission Minimized Differential Signaling ) signals are supplied through the P9 (DVI
connector ). The TMDS data pairs are assigned at #18~17(RX0)
、
#10~9 (RX1)
、
#2~1pin (RX2) and clock
pairs are assigned at #12~13(RXC), and then fed into I28(PW3200B) #9~10 (TX0)
、
#6~7 (TX1)
、
#3~4
(TX2) , #12
、
13 (TXC).
The I28 (PW3200B) supports High-bandwidth Digital Content Protection (HDCP) by decrypting the
pixel data stream received from an HDCP transmitter in the video host system. HDCP provides a secure
method of delivering high-definition content between a host (such as a set-up box, DVD player, or D-VHS
player) and display (such as an HDTV, projector, or A/V receiver).
The I28 PW3200B comes pre-programmed with a production set of HDCP keys in its internal
EEPROM. In this way, the keys are provided the highest level of protections as required by the HDCP
specification.
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