1.4.1.3.3 Encoder Port 3 / Digital IO
Pin
#
GPIO
REM 14/16MT
BiSS (LVTTL)
SSI (LVTTL)
SPI
1
3.3 V *
3.3 V *
3.3 V *
3.3 V *
3.3 V *
2
Digital IO 1**
SS
SLO
Data
SS/CS
3
Digital IO 2**
SCK
MA
Clock
SCK
4
Ground
Ground
Ground
Ground
Ground
5
Digital IO 3**
MISO
–
–
MISO
6
Digital IO 4**
MOSI
–
–
MOSI
7
5 V ***
5 V ***
5 V ***
5 V ***
5 V ***
8
–
–
–
–
–
All Digital IOs are 3.3 V LVTTL CMOS logic and can be used for data rates up to 20 Mbps.
* This is a +3.3 V supply that can provide up to 250 mA for external use.
The supply is protected against short to ground and keeps the current below 400mA in a continuous
short.
** Can be configured as 5.0 V CMOS logic. Upon request only, please contact
*** This is a +5 V supply that can provide up to 250 mA for external use.
The supply is protected against short to ground and keeps the current below 400mA in a continuous
short.
Hardware Manuals / SOMANET Node / SOMANET Node rev. E.1
© 2021 Synapticon GmbH | Daimlerstraße 26 | D-71101 Schönaich Documentation v 4.10.2 | Built 2021-07-06
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