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SC-TDC-1000 S Series Manual | Surface Concept GmbH
Note
The temporal resolution is mainly influenced by the quality of the start signal because the
TDC measures the time of a rising or a falling edge using a constant voltage threshold.
Lower precision than expected may be observed for slow rise or fall times of the signals
or in case of any ripple/jitter on the switching edge of the signals. In particular, the time
resolution may distinctively depend on any voltage variation of the ground level of the
measured start signal.
Therefore, if the signals are varying in amplitude, one needs to process them by external
electronics components (e.g. constant fraction discriminators, CFDs).
The start input of the TDC cannot handle pulses which are arriving in a time interval of
smaller than 120ns (e.g. as produced by connecting/disconnecting the start signal during
TDC operation). If two such subsequent pulses are applied to the start input of the TDC, the
device will still deliver results, but these results might contain wrong timing information.
The TDC does also not work with start signals of frequencies larger than 7MHz. For this
reason, the TDCs are equipped with an internal frequency divider. Larger start pulse
frequencies must be divided down by an appropriate dividing factor (e.g. dividing factor
of 16 for 80MHz start pulse frequency). For start frequencies smaller then 100kHz the user
must make sure that all stop signals are provided within a time window of 10.7
µ
s after
each start. Otherwise the TDC will deliver wrong time results, which are not easy to be
identified as such.
For applications with time distances larger 10.7
µ
s use the start counter or the extended
measurement range (see
).
Take care that measurements are performed either with the internal start signal (Ext_
Gpx_Start = NO) and no signal applied to the Start Input or with an external start signal
(Ext_Gpx_Start = YES) applied to the Start Input. In all other cases the TDC is not working
correctly.
Note
4.2.3 TDC Start Output (sub-R 85 and E8 only)
The TDC holds an internal electronics, which provide the TDC start signal for further extended measurement
use. The “START OUT” (BNC socket) provides either the external start if applied or the internal start,
generated by the FPGA.