2
AN-H64
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
Another source of error produced by a peak-current con-
troller such as the HV9910B is associated with the current-
sense comparator delay ∆t
CS
. The actual peak current I
L(PK)
is higher than the comparator threshold reference I
L(CS)
be-
cause of this propagation delay. Therefore, the total peak-to-
average error can be expressed as:
∆I
L(ERR)
=
V
O
t
OFF
- 2V
IN
∆t
CS
(2)
2L
where V
IN
is the input DC power supply voltage.
As one could see from Equation 2, the average inductor cur-
rent I
L(AVG)
also suffers poor load and line regulation, since it
is dependent on the input voltage V
IN
and the output voltage
V
O
.
Lastly, there is a significant part-to-part variation in the LED
current that occurs due to the CS input offset voltage V
OS
.
Although this offset voltage is only ±25mV at -40°C < T
A
< +85°C, it contributes as much as ±10% variation of the
LED current even at the maximum CS threshold voltage of
250mV.
The HV9961 overcomes the above drawbacks by means of
Supertex’s average-mode constant current control method.
The IC regulates the average inductor current I
L(AVG)
direct-
ly and accurately within ±3% over a wide GATE duty cycle
range of at least 0.1 < D < 0.75. It also includes an auto-zero
circuit at the CS input that cancels the propagation and off
-
set errors.
Linear Dimming
When the LD voltage is V
LD
≥1.5V, the output LED current is
simply programmed with the HV9961 as:
I
L(AVG)
=
272mV ±3%
(3)
R
CS
where 272mV is the internally fixed reference voltage. Oth
-
erwise:
I
L(AVG)
=
V
LD
±3%
(4)
5.5 • R
CS
Unlike the HV9910B, which has the LD range from 0 to 0.25V,
the active LD input voltage range of the HV9961 is from 0
to 1.5V. Moreover, for the HV9910B, V
LD
= GND does not
produce I
LED
= 0A due to the D
MIN
limitation. There is always
some residual LED current remaining despite connecting LD
to GND. The HV9961 overcomes this issue by disabling the
GATE output when V
LD
< 150mV. The GATE switching re
-
sumes when V
LD
> 200mV.
Note that the latter feature of the HV9961 allows a mixed-
mode PWM/linear dimming mode. A single square-wave in-
put signal can be applied at LD, where both the signal duty
cycle and its amplitude are modulated in order to expand the
dimming range.
Figure 3. Typical output voltage regulation characteristic of LED current.
HV9961
HV9910B
0
10
20
30
40
50
60
0.50
0.45
0.40
0.35
0.30
0.25
0.20
LED Current (A
)
Output Voltage (V)