Chapter 3: Installation
3-29
JPI2C1
FA
N
4
FA
N
6
FA
N
1
FA
N
2
J120
LED7
IPMB
UIOP
LED6
LED3
LED2
JWF1
SP1
JF1
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JPW1
JPW3
X8DTU-6F+
JPTLAN
JPS1
JPG1
JWD1
TPM
JI2C1
JI2C2
JL1
JOH1
SAS4~7
SAS0~3
LED1
SAS BBU
Battery
USB0/1
USB7
USB6
USB4/5
COM2
UID
TLAN2
LAN2
IPMI_LAN
KB/MOUSE
FAN8/CPU1
F
A
N7/CPU2
P2-DIMM1C
P2-DIMM2C
P2-DIMM3C
P1-DIMM2C
P1-DIMM1C
P1-DIMM3C
J2: PCI-E 2.0 X16
P1-DIMM3B
P1-DIMM3A
P1-DIMM1A
P1-DIMM1B
P1-DIMM2B
P1-DIMM2A
P2-DIMM3A
P2-DIMM3B
P2-DIMM2A
P2-DIMM2B
P2-DIMM1A
CPU2
P2-DIMM1B
CPU1
LAN1
TLAN1
PHY
JPW2
T-SGPIO1
BIOS
COM1
VGA
JPL1
J1: PCI-E 2.0 X4 (in X16)
LED5
LED4
JBT1
T-SGPIO2
FA
N
5
FAN3
LAN 1/2
CTRL
10 Gb LAN 1/2
CTRL
BMC
CTRL
IOH 36D
Intel 82576
Intel 82599
Intel
ICH 10R
Intel
SAS
CTRL
LSI 2108
(10Gb LAN1)
(10Gb LAN2)
B
A
A. Internal Speaker (Buzzer)
B. IPMB
Internal Speaker
The Internal Speaker, located at SP1,
can be used to provide audible indica-
tions for various beep codes. See the
table on the right for pin defi nitions.
Refer to the layout below for the loca-
tion of the Internal Buzzer.
Internal Buzzer (SP1)
Pin Defi nition
Pin# Defi nitions
Pin 1
Pos. (+)
Beep In
Pin 2
Neg. (-)
Alarm
Speaker
IPMB Header
Pin Defi nitions
Pin# Defi nition
1
Data
2
Ground
3
Clock
4
No Connection
IPMB
A System Management Bus header
for IPMI 2.0 is located at IPMB. Con-
nect the appropriate cable here to
use the IPMB I
2
C connection on your
system.
Summary of Contents for Supero X8DTU-6F+
Page 1: ...USER S MANUAL Revision 1 0a X8DTU 6F X8DTU 6TF X8DTU 6F LR X8DTU 6TF LR ...
Page 104: ...5 30 X8DTU 6F X8DTU 6TF X8DTU 6 T F LR Motherboard User s Manual Notes ...
Page 106: ...A 2 X8DTU 6F X8DTU 6TF X8DTU 6 T F LR User s Manual Notes ...
Page 110: ...B 4 X8DTU 6F X8DTU 6TF X8DTU 6 T F LR User s Manual Notes ...