Supero SUPER P6DLF, User Manual

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SUPER P6DLH/P6DLF User’s Manual
duces the Accelerated Graphics Port (AGP) interface. AGP is a high
performance, component level interconnect targeted at 3D applica-
tions and is based on a set of performance enhancements to PCI.
The I/O subsystem portion of the 440LX platform is based on the
PIIX4, a highly integrated version of Intel's PCI-to-ISA bridge family.
The 440LX PCI/AGP Controller (PAC) system bus interface supports
up to two Pentium II processors. It provides an optimized 72-bit
DRAM interface (64-bit data plus ECC). This interface supports
3.3V DRAM technologies. The PAC provides the interface to a PCI
bus operating at 33 MHz. This interface implementation is compli-
ant with the PCI Rev 2.1 Specification. The AGP interface is based
on the AGP Specification Rev 1.0. It can support up to 133 MHz
(532 MB/s) data transfer rates.
1-5 Wake-On-LAN (WOL)
Wake on LAN is defined as the ability of a management application
to remotely power up a computer which is powered off. Remote PC
setup, updates, and asset tracking can occur after hours and on
weekends so daily LAN traffic is kept to a minimum and users are
not interrupted.
The motherboard has a 3-pin header (WOL) used to connect to the
3-pin header on the Network Interface Card (NIC) which has WOL
capability.
1-6 Power Supply
As with all computer products, a stable power source is necessary
for proper and reliable operation. It is even more important for high
CPU clock rates like 300, 266, 233 MHz Pentium II processors.
SUPER P6DLH/P6DLF accommodates AT and ATX power supplies.
Although most power supplies generally meet the specifications re-
quired by the CPU, some power supplies are not adequate. To