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B-6

H8QM3-2/H8QMi-2 User's Manual

Checkpoint     Code Description 

    

86h

The password was checked. Performing any required programming before WIN-
BIOS Setup next.

87h

The programming before WINBIOS Setup has completed. Uncompressing the 
WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility 
next.

88h

Returned from WINBIOS Setup and cleared the screen. Performing any necessary 
programming after WINBIOS Setup next. 

89h

The programming after WINBIOS Setup has completed. Displaying the power on 
screen message next.

8Ch

Programming the WINBIOS Setup options next.

8Dh

The WINBIOS Setup options are programmed. Resetting the hard disk controller 
next.

8Fh

The hard disk controller has been reset. Confi guring the fl oppy drive controller 
next.

91h

The fl oppy drive controller has been confi gured. Confi guring the hard disk drive 
controller next.

95h

Initializing the bus option ROMs from C800 next. See the last page of this chapter 
for additional information.

96h

Initializing before passing control to the adaptor ROM at C800.

97h

Initialization before the C800 adaptor ROM gains control has completed. The adap-
tor ROM check is next.

98h

The adaptor ROM had control and has now returned control to BIOS POST.  Perform-
ing any required processing after the option ROM returned control.

99h

Any initialization required after the option ROM test has completed. Confi guring the 
timer data area and printer base address next.

9Ah

Set the timer and printer base addresses. Setting the RS-232 base address next.

9Bh

Returned after setting the RS-232 base address. Performing any required initializa-
tion before the Coprocessor test next.

9Ch

Required initialization before the Coprocessor test is over. Initializing the Coproces-
sor next.

9Dh

Coprocessor initialized. Performing any required initialization after the Coproces-
sor test next.

9Eh

Initialization after the Coprocessor test is complete. Checking the extended keyboard, 
keyboard ID, and Num Lock key next. Issuing the keyboard ID command next.

A2h

Displaying any soft errors next.

A3h

The soft error display has completed. Setting the keyboard typematic  rate next.

A4h

The keyboard typematic rate is set. Programming the memory wait states next.

A5h

Memory wait state programming is over. Clearing the screen and enabling parity 
and the NMI next.

A7h

NMI and parity enabled. Performing any initialization required before passing control 
to the adaptor ROM at E000 next.

A8h

Initialization before passing control to the adaptor ROM at E000h completed. Passing 
control to the adaptor ROM at E000h next.

Summary of Contents for H8QM3-2

Page 1: ...H8QM3 2 H8QMi 2 USER S MANUAL Revision 1 0c SUPER...

Page 2: ...UPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTW...

Page 3: ...ed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installing the processor s and memory modules and when installing the se...

Page 4: ...Power Supply 1 12 1 6 Super I O 1 12 Chapter 2 Installation 2 1 Static Sensitive Devices 2 1 2 2 Processor and Heatsink Installation 2 2 2 3 Mounting the Serverboard into a Chassis 2 4 2 4 Installing...

Page 5: ...JLAN Enable Disable 2 14 I2 C to PCI X Slots 2 14 I2 C to PCI E Slots 2 14 Compact Flash Master Slave 2 14 Watch Dog Enable Disable 2 15 PCI X Slot Speed 2 15 SAS RAID Select 2 16 2 8 Onboard Indicato...

Page 6: ...dures 3 2 3 3 Frequently Asked Questions 3 3 3 4 Returning Merchandise for Service 3 4 Chapter 4 BIOS 4 1 Introduction 4 1 4 2 Main Menu 4 2 4 3 Advanced Settings Menu 4 2 4 4 Boot Menu 4 16 4 5 Secur...

Page 7: ...n quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer Included with retail bo...

Page 8: ...ddress Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl...

Page 9: ...Chapter 1 Introduction 1 3 Figure 1 1 H8QM3 2 Image Note the H8QMi 2 has the same layout but does not include SAS ports or compo nents...

Page 10: ...1B DIMMB 1A DIMMB 2B DIMMB 2A DIMMB 3B DIMMB 3A DIMMB 4B DIMMB 4A Kybd Mouse JLAN1 USB0 1 COM1 VGA JLAN2 ATI ES 1000 SIMLC Slot 1 PCI X 133 100 MHz Slot 2 PCI Express x16 Slot 3 PCI Express x8 Slot 4...

Page 11: ...used with SAS COM1 COM2 COM1 Serial Port Header FAN 1 9 Chassis CPU Fan Headers Floppy Floppy Disk Drive Connector I Button I Button for RAID 5 support IDE IDE Drive Compact Flash Card Connector J1B1...

Page 12: ...1 PCI Express x4 slot x8 slot using x4 signal One 1 PCI X 133 100 MHz slot One 1 SIMLC slot for IPMI card BIOS 8 Mb AMIBIOS LPC Flash ROM DMI 2 3 PCI 2 2 ACPI 2 0 SMBIOS 2 3 Plug and Play PnP PC Healt...

Page 13: ...ght 8 SAS ports RAID 0 1 10 and JBOD optional RAID 5 support with iButton installed H8QM3 2 only One 1 UltraDMA ATA 133 100 IDE port One 1 oppy port interface Two 2 Fast UART 16550 compatible serial p...

Page 14: ...GHz DDR2 667 533 400 DDR2 667 533 400 SATA Ports 6 IDE ATA133 USB Ports 4 S I O BIOS Floppy Kybd Mouse Serial Ports 2 AMD Socket F Type Processor CPU1 PCI E LPC ATI ES 1000 nVidia IO55 AMD Socket F Ty...

Page 15: ...nterface and a USB 2 0 interface This hub connects directly to CPU1 IO55 This hub connects directly to CPU2 via a 16 x 16 1 GHz Hyper Transport link The IO55 includes an interface for the PCI Express...

Page 16: ...onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This feature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS...

Page 17: ...provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power wil...

Page 18: ...data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated ont...

Page 19: ...d and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting...

Page 20: ...he CPU1 socket For a dual CPU con guration install to the CPU1 and CPU2 sockets Exercise extreme caution when handling and installing the proces sor Always connect the power cord last and always remov...

Page 21: ...the four corners of the CPU to make sure that it is properly in stalled and ush with the socket Then gently lower the silver CPU retention plate into place 5 Carefully press the CPU socket le ver down...

Page 22: ...doffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to the mainboard tray tighten until just...

Page 23: ...with memory modules of the same size and type will result in inter leaved 128 bit memory which is faster than non interleaved 64 bit memory Optimizing memory performance It is better to spread pairs o...

Page 24: ...ious I O ports Figure 2 3 I O Port Locations and De nitions Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin de nitions of the various...

Page 25: ...COM 7 COM 20 Res NC 8 PWR_OK 21 5V 9 5VSB 22 5V 10 12V 23 5V 11 12V 24 COM 12 3 3V Processor Power Connectors In addition to the primary ATX power connector above the 8 pin proces sor power connectors...

Page 26: ...on the right for pin de nitions OH Fan Fail LED Pin De nitions JF1 Pin De nition 7 Vcc 8 Control NIC1 LED Pin De nitions JF1 Pin De nition 11 Vcc 12 NIC1 Active NIC2 LED Pin De nitions JF1 Pin De nit...

Page 27: ...Serial Bus Ports USB0 1 Two Universal Serial Bus ports USB2 0 are located beside the key board mouse ports See the table on the right for pin de nitions Reset Button Pin De nitions JF1 Pin De nition...

Page 28: ...nd 10 NC Fan Header Pin De nitions FAN1 9 Pin De nition 1 Ground Black 2 12V 9V Red 3 Tachometer Note Fan speed may controlled by a BIOS setting to change with system temperature As a result pin 2 may...

Page 29: ...1 Intrusion Input 2 Ground Wake On LAN The Wake On LAN header is desig nated JWOL See the table on the right for pin definitions You must have a LAN card with a Wake On LAN connector and cable to use...

Page 30: ...IO2 The 3 SGPIO1 and 3 SGPIO2 head ers provide a bus between the SAS controller and the drive backplane to provide SAS enclosure manage ment functions Connect cables from the backplane to the these he...

Page 31: ...the PW_ON connector to clear CMOS The onboard battery does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds JBT1 contact pads 2 7 Jumper Settings Explana...

Page 32: ...set to the enabled or disabled set ting for this feature to function See the table on the right for jumper settings I2 C to PCI X Slots Jumper Settings JI2 C1 JI2 C2 Jumper Setting De nition Pins 1 2...

Page 33: ...Speed Jumpers JPX1A and JPX2A can be used to change the speed of the PCI X slot 1 Note that any JPX2A setting overrides all JPX1A settings To use a JPX1A setting JPX2A should be left open See the tab...

Page 34: ...off Be sure to turn off the system and unplug the power cord s before removing or installing components Flashing IT Firmware 1 Download the appropriate IT rmware from the web site ftp ftp supermicro...

Page 35: ...ould be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE connector interface and the other connector s to your hard drive s Consult the doc...

Page 36: ...t Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DRQ3 22 Ground 23 I O Write 24 Ground 25 I O Read 26 Ground 27 IOCHRDY 28 BAL...

Page 37: ...ons Note refer to the FAQ section in Chapter 3 for details on en abling SAS SIMLC IPMI Slot The SIMLC slot on the H8QM3 2 and H8QMi 2 is reserved for an optional IPMI card Note with an IPMI card in st...

Page 38: ...below and install the driver during the OS installation Note the SATA RAID driver is supported by Windows 2000 and XP only Building a Driver Diskette You must rst build a driver diskette from the CD...

Page 39: ...y press the F7 key You will be prompted to verify your choice if you want to continue with your choices select Yes Note that selecting Yes will clear all previous data from the drives you selected to...

Page 40: ...2 22 H8QM3 2 H8QMi 2 User s Manual Figure 2 5 SATA RAID Utility Main Screen Figure 2 6 SATA RAID Utility Array List...

Page 41: ...mputer icon and then on the icon representing your CD ROM drive Finally double click on the S Setup icon Click the icons showing a hand writing on paper to view the readme les for each item Click the...

Page 42: ...2 24 H8QM3 2 H8QMi 2 User s Manual Notes...

Page 43: ...hose for the keyboard and mouse 5 Remove all add on cards 6 Install CPUs and heatsinks making sure they are fully seated and connect the internal chassis speaker and the power LED to the serverboard C...

Page 44: ...n Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If...

Page 45: ...ded that you not upgrade your BIOS if you are not experi encing problems with your system Updated BIOS les are located on our web site Please check our BIOS warning message and the information on how...

Page 46: ...the ATA133 technology offers Connect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details o...

Page 47: ...F1 F2 etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be con gured Grayed out options cannot be co...

Page 48: ...be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced S...

Page 49: ...bled and Disabled Interrupt 19 Capture Select Enabled to allow ROMs to trap Interrupt 19 The options are Enabled and Disabled OS Installation Change this setting if using a 64 bit Linux operating syst...

Page 50: ...n unexpected loss of power The options are Power Off Power On and Last State Watch Dog Timer This setting is used to Enable or Disable the Watch Dog Timer function It must be used in conjunction with...

Page 51: ...ing This setting is used to Enable or Disable Thermal Throttling Floppy IDE SATA Con guration Floppy A Move the cursor to these elds via up and down arrow keys to select the oppy type The options are...

Page 52: ...per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sector at a time Select...

Page 53: ...activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled Serial ATA0 1 2 Primary Secondary Channel Highlight one of the items above...

Page 54: ...ROM drives check the speci cations of the drive DMA Mode Selects the DMA Mode Options are SWDMA0 SWDMA1 SWDMA2 MWDMA0 MDWDMA1 MWDMA2 UDMA0 UDMA1 UDMA2 UDMA3 UDMA4 and UDMA5 SWDMA Single Word DMA MWDM...

Page 55: ...errupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function pr...

Page 56: ...ddress This option speci es the base I O port address and Interrupt Request address of serial port 1 Select Disabled to prevent the serial port from accessing any system resources When this option is...

Page 57: ...Enable Clock to All DIMMs Use this setting to enable unused clocks to all DIMMs even if some DIMM slots are unpopulated Options are Enabled and Disabled Mem Clk Tristate C3 ALTVID Use this setting to...

Page 58: ...conds and microseconds L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Data Cache BG Scrub Allows L1 cache RAM to...

Page 59: ...r disable the USB 1 1 controller USB 2 0 Controller Enable or disable the USB 2 0 controller USB Devices Enabled This eld dsiplays the USB devices currently enabled Legacy USB Support Select Enabled t...

Page 60: ...n Remote Access Allows you to Enable or Disable remote access If enabled the settings below will appear Serial Port Number Selects the serial port to use for console redirection Options are COM1 and C...

Page 61: ...eshold set The default setting is 72o C Other items in the submenu are systems monitor displays for the following in formation CPU1 Temperature CPU2 Temperature CPU3 Temperature CPU4 Temperature for 4...

Page 62: ...Device Hard Disk Drives This feature allows the user to specify the boot sequence from available hard disk drives 1st Drive Speci es the boot sequence for the 1st Hard Drive Hard Disk Drives This feat...

Page 63: ...ord Select this option and press Enter to access the sub menu and then type in the password Boot Sector Virus Protection This option is near the bottom of the Security Setup screen Select Disabled to...

Page 64: ...n and reboot the computer Select Discard Changes and Exit from the Exit menu and press Enter Discard Changes Select this option and press Enter to discard all the changes and return to AMI BIOS Utilit...

Page 65: ...ally communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the e...

Page 66: ...A 2 H8QM3 2 H8QMi 2 User s Manual Notes...

Page 67: ...s are listed in order of execution Checkpoint Code Description D0h The NMI is disabled Power on delay is starting Next the initialization code check sum will be veri ed D1h Initializing the DMA contro...

Page 68: ...occurred while reading the oppy drive in drive A F0h Next searching for the AMIBOOT ROM le in the root directory F1h The AMIBOOT ROM le is not in the root directory F2h Next reading and analyzing the...

Page 69: ...d during power on Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the End key was pressed 12h Next disabling DMA controllers 1 and 2 and interru...

Page 70: ...PL general devices next if present See the last page of this chapter for additional information 39h Displaying bus initialization error messages See the last page of this chapter for additional inform...

Page 71: ...was adjusted for relocation and shadowing Clearing the Hit DEL message next 59h The Hit DEL message is cleared The WAIT message is displayed Starting the DMA and interrupt controller test next 60h The...

Page 72: ...ontrol and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control 99h Any initialization required after the option ROM test has completed Con g...

Page 73: ...option ROM had control next Aah Initialization after E000 option ROM control has completed Displaying the system con guration next Abh Uncompressing the DMI data and executing DMI POST initialization...

Page 74: ...B 8 H8QM3 2 H8QMi 2 User s Manual Notes...

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