Supero C7Z170-SQ, User Manual

Page: 57 / 155

Chapter 2: Installation
2-25
DOM PWR Connector (JSD1)
The Disk-On-Module (DOM) power con-
nector, located at JSD1, provides 5V
(Gen1/Gen) power to a solid state DOM
storage device connected to one of the
SATA ports. See the table on the right
for pin definitions.
DOM PWR
Pin Definitions
Pin# Definition
1 5V
2 Ground
3 Ground
A.DOM PWR
B. S/PDIF OUt
SPDIF OUT (JSPDIF_OUT)
The SPDIF Out (JSPDIF_OUT) is used for
digital audio output. You will also need
the appropriate cable to use this feature.
SPDIF_OUT
Pin Definitions
Pin# Definition
1 S/PDIF_Out
2 Ground
JBR1
MH1 MH2
MH6
B1
+
J37
1 2
10
10
2
JB
T1
JSTBY1
+
SP1
JD1
4 1
OC_FR
ONT_P
ANEL
JF1
JSD1
FAN5
FAN1
FAN4
FAN2
FAN3
S4
S8
S11
1
JPW1
LED2
A
A
LED1
JPW2
1
JL1
LED4
PCIE5 PCIE3 PCIE1
JVR1
JPUSB1
JLED1
3
JPAC1
1
3
JPL1
JP
ME2
JPCIE2
JPCIE6 JPCIE4
C7Z170-SQ
REV:1.01a
MAC CODE
BAR CODE
USB2/3
USB4/5
USB 6/7(3.0)
X
PWR
HDD
LED
LED
NIC
1
OH/FF
X
RST
PWR
ON
PCIE M.2 CONNECTOR
On: BIOS REC
OVER
Y
O
ff
: NORM
AL
JBR1
JTB
T1
USB 11/12(3.0)
LAN
TPM/PORT80
INSTRUCTION
CHASSIS
JL1:
BIOS Restore
CLEAR CMOS
KB/MOUSE
USB 0/1
USB 9/10(3.0)
DIMMB2
DIMMB1
DIMMA2
DIMMA1
POWER BUTTON
HDMI
VESA DISPLAY
PORT
PCH SL
O
T1 PCI-E 3.0 X1 (IN X4)
CPU SL
O
T2 PCI-E 3.0 X4 (IN X16)
PCH SL
O
T3 PCI-E 3.0 X4
CPU SL
O
T4 PCI-E 3.0 X8 (IN X16)
PCH SL
O
T5 PCI-E 3.0 X1 (IN X4)
CPU SL
O
T6 PCI-E 3.0 X16
5V STBY POWER
2-3 DISABLE
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
JSTBY1:
JWD1:
JSD1:
2-3:DISABLE
1-2:ENABLE
JPL1:LAN
2-3:NMI 1-2:RST
W
AT
CH DOG
CPU
2-3:ME MANUFACTURING MODE
CPU FAN
1-2:NORMAL
JPME2:
SATA DOM PWR
JTPM1:
JLED1:
3 PIN POWER LED
AUDIO FP
JBT1
CMOS CLEAR
PWR LED:PIN 1-3 JD1: SPEAKER:PIN 4-7
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
HD AUDIO
JF1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
COM1
2-3:DISABLE
1-2:ENABLE
JPAC1:AUDIO
JL2
JI2C2
JI2C1
JBR1
OC_FR
ONT_P
ANEL
I-SATA2
I-SATA3 I-SATA1 I-SATA5
I-SATA0
I-SATA4
DVI-D
USB 8 (3.1)
Type C
JSPDIF_OUT
S/PDIF OUT
BIOS
JWD1
A
B