RM0082
LS_Fast IrDA controller
Doc ID 018672 Rev 1
575/844
duration for FIR transmission (like MIR), the
baud rate generation unit
has to create a pulse
rate of fen_pulse = 4* f
en_symb
.
provides a list of the settings of K, L and (N+1) parameters in case of SIR, MIR
and FIR (and with f
irda_clk
= 48 MHz).
26.3.6 FIFO
unit
The
FIFO unit
allows to control the data transfer between peripheral and system memory,
and to buffer the reception and the transmission data.
In particular, data can be transmitted by writing to the transmission buffer register
(IrDA_TXB,
), which represent the head of the FIFO, and can be read out
from the reception buffer register (IrDA_RXB,
), which is the tail of the FIFO.
An 8-stage 32 bit shift register is used as buffer. This allows that data can be transferred at
full speed using DMA burst transfers.
Note:
Since IrDA supports only half-duplex communication, one buffer is used for both
transmission and reception.
The FIrDA controller generates the following request signals to control the data transfer to
and from memory.
:
These signals can either be used as either interrupt requests (
) or DMA
requests, and they are reset on the occurrence of the request clear signal (
REQCLR
) which is
either set by software via IrDA_ICR register (
) or generated by a DMA
Table 492.
Settings of K,L and (N+1) parameters for SIR,MIR and FIR in baud rate
generation unit
Bit rate [Kbps]
f
en_pulse
[kHz]
f
en_symb
[kHz]
K
L
N+1
SIR
9.6
576
9.6
3
250
60
19.2
576
19.2
3
250
30
38.4
576
38.4
3
250
15
57.6
576
57.6
3
250
10
115.2
576
115.2
3
250
5
MIR
576
2304
576
6
125
4
1152
4608
1152
12
125
4
FIR
4000
8000
2000
1
6
4
Table 493.
Request signals
Signal
Description
BREQ_INT
Burst request signal. Request a transfer of a programmed burst of words.
LBREQ_INT
Last burst request signal. Request a last burst transfer.
SREQ_INT
Single request signal. Request a transfer of a single word.
LSREQ_INT
Last single request signal. Request a last single transfer.
