Star Lake AV710-X3 Quick Installation Manual Download Page 17 | Manualshive

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• 3.2.8 Advanced > Serial Console Redirection

Feature

Options

Description

COM1

Info only

Console Redirection

Enabled

Disabled

Console Redirection Enable or Disable.

Console Redirection Settings

Submenu

The settings specify how the host computer and the
remote computer (which the user is using) will
exchange data.
Both computers should have the same or compatible
settings.
The item will be lunched before enable Console
Redirection.

COM2

Info only

Console Redirection

Enabled

Disabled

Console Redirection Enable or Disable.

Console Redirection Settings

Submenu

The settings specify how the host computer and the
remote computer (which the user is using) will
exchange data.
Both computers should have the same or compatible
settings.
The item will be lunched before enable Console
Redirection.

COM3

Info only

Console Redirection

Enabled

Disabled

Console Redirection Enable or Disable.

Console Redirection Settings

Submenu

The settings specify how the host computer and the
remote computer (which the user is using) will
exchange data.
Both computers should have the same or compatible
settings.
The item will be lunched before enable Console
Redirection.

COM4

Info only

Console Redirection

Enabled

Disabled

Console Redirection Enable or Disable.

Console Redirection Settings

Submenu

The settings specify how the host computer and the
remote computer (which the user is using) will
exchange data.
Both computers should have the same or compatible
settings.
The item will be lunched before enable Console
Redirection.

Serial Port for Out-of-Band
Management Windows Emergency
Management Services (EMS)

Info only

Console Redirection

Disabled

Enabled

Console Redirection Enable or Disable.

Console Redirection Settings

Submenu

The settings specify how the host computer and the
remote computer(which the user is using) will
exchange data. Both computers should have the
same or compatible settings.

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Summary of Contents for AV710-X3

Page 1: ...Version 1 0 Revision Date 03 15 2022 Quick Installation Guide IP65 MXM GPU Server with Intel Xeon D 1577 processor MIL STD 461 EMI 18 36V DC In AV710 X3 1 ...

Page 2: ...s broken do not try to fix it by yourself Contact a qualified service technician or your local distributor Operation safety uBefore installing the motherboard and adding devices on it carefully read all the manuals that came with the package uBefore using the product make sure all cables are correctly connected and the power cables are not damaged If you detect any damage contact your dealer immed...

Page 3: ...em uCD Driver Quick Installation Guide Ordering information Model Number De Scription AV710 X3 Military MXM GPU Server with Intel Xeon D 1577 Processor IP65 rating MIL STD D38999 Connectors 18 36V DC in Extreme Rugged Operating Temperature 40 to 60 C If any of the above items is damaged or missing please contact your local distributor 3 ...

Page 4: ...NT 2 REVISION HISTORY 3 PACKINGLIST 3 ORDERING INFORMATION 3 TABLECONTENTS 4 CHAPTER 1 PRODUCT INTRODUCTION 5 KEY FEATURES 5 DIMENSIONS 6 CHAPTER 2 JUMPERS AND CONNECTORS LOCATIONS 7 u CONNECTOR PIN DEFINITIONS 7 Connector X1 X2 X3 8 Connector X4 X5 X6 9 CHAPTER 3 BIOS SETUP 10 50 4 ...

Page 5: ...98S 10Gb Ethernet 1 x 10GbE Copper LAN Amphenol TV07RW 13 98S COM 1 x COM Amphenol TV07RW 13 98S Applications Applications Military Platforms Requiring Compliance to MIL STD 810G Embedded Computing and applications subject to Harsh Temperature Shock Vibration Altitude Dust and EMI Conditions Operation System OS Windows 10 64bit Linux by request Mechanical Environment Chassis Aluminum Alloy Corrosi...

Page 6: ... Dimensions 6 ...

Page 7: ...Panel Component 1 GbE LAN label X1 2 10GbE Copper LAN label X2 3 10GbE Copper LAN label X3 4 DVI D label X4 5 COM label X5 6 DC In Label X6 7 Waterproof valve label X7 8 Power Button with LED backlight 7 ...

Page 8: ...Chapter 2 Jumpers and Connectors Locations l D38999 Connector PinDefinitions X1 GbE LAN X2 10GbE LAN X3 10GbE LAN 8 ...

Page 9: ... X4 DVI D X5 COM X6 DC In 9 ...

Page 10: ...rd Secure Boot Boot Configuration FIXED BOOT ORDER Priorities UEFI USB Key Drive BBS Priorities Save Change and Exit Discard Changes and Exit Save Changes and Reset Discard Changes and Reset Save Options Boot Override Miscellaneous Driver Health Trusted Computing Notes u indicates a submenu Gray text indicates info only 3 1 1 Main The Main Menu provides read only information about your system and ...

Page 11: ...pecifies the number of times the external power supply has been shut down Boot Cycles Info only The Boot counter is increased after a HW or SW Reset or after a successful power up Feature Options Description Boot Reason Info only The boot reason is the event which causes the reboot of the system 3 1 5 Main System Date Time Feature Options Description System Date Info only System Time Info only 3 1...

Page 12: ...Display Current Input Current Current Input Power Info Only Display Current Input Power VCORE Info Only Display VCORE Voltage VMEM Info Only Display VMEM Voltage 5VSB Info Only Display 5VSB Voltage VIN Info Only Display VIN Voltage 3 3VSB Info Only Display 3 3VSB Voltage 5V Info Only Display 5V Voltage 3 2 3 Advanced System Management Feature Options Description System Management Info Only Version...

Page 13: ...ve Cooling Trip Point Disabled 80 C 90 C The value is the temperature threshold of the Passive Cooling Trip Point Watchdog ACPI Event Shutdown Disabled Enabled Watchdog ACPI Event Shutdown Enabled Disabled 3 2 4 1 Advanced Thermal Management Thermal and Fan Speed Feature Options Description Temperatures and Fan Speed Info Only CPU Temperature Info Only Current Info Only Display Current CPU Tempera...

Page 14: ...gger Temperature 3 2 5 Advanced Watchdog Timer Feature Options Description Watchdog Timer Info only Power Up Watchdog Disabled Enabled The Power Up Watchdog resets the system after a certain amount of time after power up 3 2 6 Advanced CSM Configuration Feature Options Description Compatibility Support Module Configuration Info only CSM Support Disableed Enabled Enabled Disabled CSM Support CSM16 ...

Page 15: ...ly Serial Port 1 Configuration Submenu Set Parameters of Serial Port 1 COMA Serial Port 2 Configuration Submenu Set Parameters of Serial Port 2 COMB Super IO Chip W83627DHG Info Only Serial Port 1 Configuration Submenu Set Parameters of Serial Port 1 COMA Serial Port 2 Configuration Submenu Set Parameters of Serial Port 2 COMB 3 2 7 1 Advanced Super IO Configuration Serial Port 1 Configuration NCT...

Page 16: ...OMA Serial Port 1 Configuration Info only Serial Port Disableed Enabled Enable or Disable Serial Port COM Device Settings Info Only Display IO IRQ information of COM Port Change Settings Auto IO 3F8h IRQ 4 IO 3F8h IRQ 3 4 5 6 7 10 11 12 IO 2F8h IRQ 3 4 5 6 7 10 11 12 IO 3E8h IRQ 3 4 5 6 7 10 11 12 IO 2E8h IRQ 3 4 5 6 7 10 11 12 Select an optimal setting for Super IO Device 3 2 7 4 Advanced Super I...

Page 17: ... Console Redirection Enable or Disable Console Redirection Settings Submenu The settings specify how the host computer and the remote computer which the user is using will exchange data Both computers should have the same or compatible settings The item will be lunched before enable Console Redirection COM4 Info only Console Redirection Enabled Disabled Console Redirection Enable or Disable Consol...

Page 18: ... for error detection They can be used as an additional data bit Stop Bits 1 2 Stop bits indicate the end of a serial data packet A start bit indicates the beginning The standard setting is 1 stop bit Communication with slow devices may require more than 1 stop bit Flow Control None Hardware RTS CTS Flow control can prevent data loss from buffer overflow When sending data if the receiving buffers a...

Page 19: ...arity bit is 0 if the num of 1 s in the data bits is even Odd parity bit is 0 if num of 1 s in the data bits is odd Mark parity bit is always 1 Space Parity bit is always 0 Mark and Space Parity do not allow for error detection They can be used as an additional data bit Stop Bits 1 2 Stop bits indicate the end of a serial data packet A start bit indicates the beginning The standard setting is 1 st...

Page 20: ...lower speeds Data Bits 7 8 Data Bits Parity None Even Odd Mark Space A parity bit can be sent with the data bits to detect some transmission errors Even parity bit is 0 if the num of 1 s in the data bits is even Odd parity bit is 0 if num of 1 s in the data bits is odd Mark parity bit is always 1 Space Parity bit is always 0 Mark and Space Parity do not allow for error detection They can be used a...

Page 21: ...8 encoding to map Unicode chars onto 1 or more bytes Bits per second 9600 19200 38400 57600 115200 Selects serial port transmission speed The speed must be matched on the other side Long or noisy lines may require lower speeds Data Bits 7 8 Data Bits Parity None Even Odd Mark Space A parity bit can be sent with the data bits to detect some transmission errors Even parity bit is 0 if the num of 1 s...

Page 22: ... Redirection Legacy Console Redirection Settings Feature Options Description Legacy Serial Redirection Port COM1 COM2 COM3 COM4 Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages 3 2 9 Advanced USB Configuration Feature Options Description USB Configuration Info Only USB Module Version Info Only Display USB Module Version USB Controllers Info Only Display USB Controlle...

Page 23: ...ub descriptor 3 2 10 Advanced Network Stack Configuration Feature Options Description Network Stack Disable Enable Enable Disable UEFI Network Stack 3 2 11 Advanced Miscellaneous Feature Options Description Miscellanous Info Only Control the PCI Express Root Port Smart Battery Function Disable Enable Enable Disable Battery Function I2C write protect control Active Write protect I2C write protect c...

Page 24: ...Device Platform hierarchy Disable Enable Enable or Disable Platform Hierarchy Storage Hierarchy Disable Enable Enable or Disable Storage Hierarchy Endorsement Hierarchy Disable Enable Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Select the TCG2 Spec Version Support TCG_1_2 the Compatible mode for Win8 Win10 TCG_2 Support new TCG2 protocol and event format for Win1...

Page 25: ...ble Hyper Threading Software Method to Enable Disable Logical Processor threads Execute Disable Bit Disable Enable When disabled forces the XD feature flag to always return 0 Enable Intel TXT Support Disable Enable Enables Intel Trusted Execution Technology Configuration Please disable EV DFX Features when TXT is enabled VMX Disable Enable Enables the Vanderpool Technology takes effect after reboo...

Page 26: ... Logical indicates the P state domain for each logical proc in the system Per Package all procs indicate the same domain in the same package P state coordination HW_ALL SW_ALL SW_ANY HW_ALL hardware coordination is recommended over SW_ALL and SW_ANY software coordination Energy efficient P state Disable Enable Enable Disable Energy efficient P state feature When set to 0 will disable access to ENE...

Page 27: ...quency Auto 1333 Maximum Memory Frequency Selections in Mhz Do not select Reserved 1400 1600 1800 1867 2000 2133 2200 2400 2600 2667 2800 2933 3000 3200 Reserved Memory Topology Submenu Display memory information 3 3 4 Chipset IIO Configuration Feature Options Description IIO Configuration Info only PCIe Hot Plug Disable Enable Auto MANUAL Enable Disable PCIe Hot Plug globally PCIe ACPI Hot Plug D...

Page 28: ...Port2A Info only PCI E Port Auto Enable Disable In auto mode the BIOS will remove the EXP port if there is no device or errors on that device and the device is not HP capable Disable is used to disable the port and hide its CFG space Hot Plug Capable Disable Enable This option specifies if the link is considered Hot Plug capable PCI E Port Link Enable Disable This option disables the link so that ...

Page 29: ...Eq Mode Auto Enable Phase 0 1 2 3 Disable Phase 0 1 2 3 Enable Phase 1 Only Enable Phase 0 1 Only Advanced Enable MMM Offset West Alt Short Channel PCIe Gen3 Adaptive Equalization Mode Gen3 Spec Mode Auto 0 70 July Sept Sept PCIe Gen3 Spec Mode Gen3 Phase2 Mode Hardware Adaptive Manual Gen3 DN Tx Present Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 ...

Page 30: ...e no training occurs but the CFG space is still active Link Speed Auto Gen1 2 5 GT s Gen2 5 GT s Gen3 8 GT s Override Max Link Wid Auto x1 x2 x4 x8 x16 Override the max link width that was set by bifurcation PCI E Port DeEmphasis 6 0 dB 3 5 dB De Emphasis control LNKCON2 6 for this PCIe port PCI E Port Link Status Info only PCI E Port Link Max Info only PCI E Port Link Speed Info only PCI E ASPM S...

Page 31: ...t Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Downstream Tx Present Gen3 DN Rx Preset Hint Auto P0 6 0 dB P1 7 0 dB P2 8 0 dB P3 9 0 dB P4 10 0 dB P5 11 0 dB P6 12 0 dB PCIe Gen3 Downstream Rx Present Hint Gen3 UP Tx Preset Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0...

Page 32: ...control LNKCON2 6 for this PCIe port PCI E Port Link Status Info only PCI E Port Link Max Info only PCI E Port Link Speed Info only PCI E ASPM Support Auto Disable L1 Only This option enables disables the ASPM L1 support for the downstream devices Fatal Err Over Disable Enable Enables forcing fatal error propagation to the IIO core error logic for this port Non Fatal Err Over Disable Enable Enable...

Page 33: ...0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Upstream Tx Preset Hide Port no yes User can force to hide this root port from OS Pcie Ecrc Disable Enable Auto Enable Disable Pcie Ecrc Support for this port 3 3 4 2 Chipset IIO Configuration Intel VT for Directed I O VT d Feature Options Description Intel...

Page 34: ...le Disable Enable Disable Isoch VT_D Engine Coherency support 3 3 5 Chipset IIO Configuration Feature Options Description IIO Configuration Info only PCIe Hot Plug Disable Enable Auto MANUAL Enable Disable PCIe Hot Plug globally PCIe ACPI Hot Plug Disable Enable Per port Enable Disable ACPI Hot Plug globally or allow per port control When Disabled MSI is generated on HP event When Enabled _HPGPE m...

Page 35: ...Port2A Info only PCI E Port Auto Enable Disable In auto mode the BIOS will remove the EXP port if there is no device or errors on that device and the device is not HP capable Disable is used to disable the port and hide its CFG space Hot Plug Capable Disable Enable This option specifies if the link is considered Hot Plug capable PCI E Port Link Enable Disable This option disables the link so that ...

Page 36: ...Eq Mode Auto Enable Phase 0 1 2 3 Disable Phase 0 1 2 3 Enable Phase 1 Only Enable Phase 0 1 Only Advanced Enable MMM Offset West Alt Short Channel PCIe Gen3 Adaptive Equalization Mode Gen3 Spec Mode Auto 0 70 July Sept Sept PCIe Gen3 Spec Mode Gen3 Phase2 Mode Hardware Adaptive Manual Gen3 DN Tx Present Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 ...

Page 37: ...e no training occurs but the CFG space is still active Link Speed Auto Gen1 2 5 GT s Gen2 5 GT s Gen3 8 GT s Override Max Link Wid Auto x1 x2 x4 x8 x16 Override the max link width that was set by bifurcation PCI E Port DeEmphasis 6 0 dB 3 5 dB De Emphasis control LNKCON2 6 for this PCIe port PCI E Port Link Status Info only PCI E Port Link Max Info only PCI E Port Link Speed Info only PCI E ASPM S...

Page 38: ...t Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Downstream Tx Present Gen3 DN Rx Preset Hint Auto P0 6 0 dB P1 7 0 dB P2 8 0 dB P3 9 0 dB P4 10 0 dB P5 11 0 dB P6 12 0 dB PCIe Gen3 Downstream Rx Present Hint Gen3 UP Tx Preset Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0...

Page 39: ...control LNKCON2 6 for this PCIe port PCI E Port Link Status Info only PCI E Port Link Max Info only PCI E Port Link Speed Info only PCI E ASPM Support Auto Disable L1 Only This option enables disables the ASPM L1 support for the downstream devices Fatal Err Over Disable Enable Enables forcing fatal error propagation to the IIO core error logic for this port Non Fatal Err Over Disable Enable Enable...

Page 40: ...0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Upstream Tx Preset Hide Port no yes User can force to hide this root port from OS Pcie Ecrc Disable Enable Auto Enable Disable Pcie Ecrc Support for this port 3 3 5 2 Chipset IIO Configuration Intel VT for Directed I O VT d Feature Options Description Intel...

Page 41: ...ption Feature Options Description Password Description Info only Setup Administrator Password Enter Password Set Setup Administrator Password User Password Enter Password Set User Password Secure Boot Submenu Customizable Secure Boot settings System Mode Info only Secure Boot Info only Vender Keys Info only Attempt Secure Boot Disabled Enabled Secure Boot activated when Platform Key PK is enrolled...

Page 42: ...em boot order Boot Option 3 USB Hard Disk Set the system boot order Boot Option 4 USB CD DVD Set the system boot order Boot Option 5 USB Key Set the system boot order Boot Option 6 USB Floppy Set the system boot order Boot Option 7 USB Lan Set the system boot order Boot Option 8 Network Set the system boot order 3 6 Save Exit Feature Options Description Save Changes and Exit Exit system setup afte...

Page 43: ...Innovation Framework for EFI the Framework The Framework refers the following boot phases which may apply to various status code checkpoint descriptions Security SEC initial low level initialization Pre EFI Initialization PEI memory initialization1 Driver Execution Environment DXE main hardware initialization2 Boot Device Selection BDS system setup pre OS user interface selecting a bootable device...

Page 44: ...I 4 1 Standard Status Codes 4 1 1 SEC Phase Status Code Description 0x00 Not used Progress Codes 0x01 Power on Reset type detection soft hard 0x02 AP initialization before microcode loading 0x03 North Bridge initialization before microcode loading 0x04 South Bridge initialization before microcode loading 0x05 OEM initialization before microcode loading 0x06 Microcode loading 0x07 AP initialization...

Page 45: ...n North Bridge module specific 0x19 Pre memory South Bridge initialization is started 0x1A Pre memory South Bridge initialization South Bridge module specific 0x1B Pre memory South Bridge initialization South Bridge module specific 0x1C Pre memory South Bridge initialization South Bridge module specific 0x1D 0x2A OEM pre memory initialization codes 0x2B Memory initialization Serial Presence Detect...

Page 46: ...ic 0x3F 0x4E OEM post memory initialization codes 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error Invalid memory type or incompatible memory speed 0x51 Memory initialization error SPD reading has failed 0x52 Memory initialization error Invalid memory size or memory modules do not match 0x53 Memory initialization error No usable memory detected 0x54 Unspecified memory initi...

Page 47: ...overy firmware image is found 0xF4 Recovery firmware image is loaded 0xF5 0xF7 Reserved for future AMI progress codes Recovery Error Codes 0xF8 Recovery PPI is not available 0xF9 Recovery capsule is not found 0xFA Invalid recovery capsule 0xFB 0xFF Reserved for future AMI error codes 4 1 4 PEI Beep Codes of Beeps Description 1 Memory not Installed 1 Memory was installed twice InstallPeiMemory rout...

Page 48: ...h Bridge DXE initialization North Bridge module specific 0x6F North Bridge DXE initialization North Bridge module specific 0x70 South Bridge DXE initialization is started 0x71 South Bridge DXE SMM initialization is started 0x72 South Bridge devices initialization 0x73 South Bridge DXE Initialization South Bridge module specific 0x74 South Bridge DXE Initialization South Bridge module specific 0x75...

Page 49: ...SI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup 0xAA Reserved for ASL see ASL Status Codes section below 0xAB Setup Input Wait 0xAC Reserved for ASL see ASL Status Codes section below 0xAD Ready To Boot event 0xAE Legacy Boot event 0xAF Exit Boot Services event 0xB0 Runtime Set Virtual Address MAP Begin 0xB1 Runtime S...

Page 50: ...t Option LoadImage returned error 0xDA Boot Option is failed StartImage returned error 0xDB Flash update is failed 0xDC Reset protocol is not available 4 1 6 DXE Beep Codes of Beeps Description 1 Invalid password 4 Some of the Architectural Protocols are not available 5 No Console Output Devices are found 5 No Console Input Devices are found 6 Flash update is failed 7 Reset protocol is not availab...

Page 51: ...roller is in PIC mode 0xAA System has transitioned into ACPI mode Interrupt controller is in APIC mode 4 1 OEM Reserved Checkpoint Ranges Status Code Description 0x05 OEM SEC initialization before microcode loading 0x0A OEM SEC initialization after microcode loading 0x1D 0x2A OEM pre memory initialization codes 0x3F 0x4E OEM PEI post memory initialization codes 0x80 0x8F OEM DXE initialization cod...

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