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SP1X12
16
5.1 DMX512 Timing Diagram
frame (22,7ms)
= Break + MAB + Start byte + data packet
with up to 512 bytes
MBB
Mark Before Break
= Time between two frames
Slot Time (44µs)
= 1 start bit, data byte (8bit), 2 Stop bits
Time between Slots = time between 2 data bytes Slots (Mark)
5.2 RETIMER – reduced timing
In mode 5, 6, 7, and 8 the SP1X12 transmits the DMX512 data with
a reduced DMX512 timing.
Break = 176 µs, MAB = 12 µs, Time between 2 bytes = 4µs,
MBB = 1ms, the whole frame (Break to Break) = B2B = 25,8ms
6. Explanations
6.1 Delays
The delay of the DMX512 signal from input to output depends from
the used mode. In mode
0
only delays up to 4µs appears. All other
modes in which the DMX512 signal is processed, delays up to
20ms appears.
Summary of Contents for SP1X12
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