UM1915 Rev 3
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UM1915
STM8AF safety architecture
42
ADC
ADC_SM_0
Periodical read-back of configuration
registers
++
X
X
ADC_SM_1
Multiple acquisition by application
software
++
-
X
ADC_SM_2
Range check by application software
++
X
X
ADC_SM_3
Periodical software test for ADC
+
X
-
TIM1
and
TIM2/3
TIM_SM_0
Periodical read-back of configuration
registers
++
X
X
TIM_SM_1
Dual channel redundancy for counting
timers
++
X
X
TIM_SM_2
Dual channel redundancy for input
capture timers
++
X
X
TIM_SM_3
Loop-back scheme for PWM outputs
++
X
X
TIM4
BTIM_SM_0
Periodical read-back of configuration
registers
++
X
X
BTIM_SM_1
Dual channel redundancy for counting
timers
++
X
X
GPIO
GPIO_SM_0
Periodical read-back of configuration
registers
++
X
X
GPIO_SM_1
Dual channel redundancy for input GPIO
lines
++
X
X
GPIO_SM_2
Loop-back scheme for output GPIO lines
++
X
X
GPIO_SM_3
GPIO port configuration lock register
+
-
-
Address
and
Data bus
BUS_SM_0
Periodical software test for
interconnections
++
X
-
BUS_SM_1
Information redundancy in intra-chip data
exchanges
++
X
X
Supply voltage
system
VSUP_SM_0
Periodical read-back of configuration
registers
++
X
X
VSUP_SM_1
Supply voltage monitoring
++
X
-
VSUP_SM_2
Independent watchdog
++
X
-
Clock
and
Reset
CLK_SM_0
Periodical read-back of configuration
registers
++
X
X
CLK_SM_1
CSS (Clock Security System)
++
X
-
CLK_SM_2
Independent watchdog
++
X
-
CLK_SM_3
Internal clock cross-measure
+
X
-
WAURTC
WAU_SM_0
Periodical read-back of configuration
registers
++
X
X
WAU_SM_1
Software test for auto-wakeup timer at
startup
+
X
X
WWDG
and
IWDG
WDG_SM_0
Periodical read-back of configuration
registers
++
X
X
WDG_SM_1
Software test for watchdog at startup
o
X
-
Table 4. List of safety mechanisms (continued)
STM8AF
function
Diagnostic
Description
ASIL
B
Perm Trans