ST802RT1A, ST802RT1B
Registers and descriptors description
Doc ID 17049 Rev 1
33/58
Block 10BaseT echo
: Default 0. When enabled during 10BASE-T half-duplex transmit
operation, the TXEN signal does not echo onto the RXDV pin. The TXEN echoes onto the
CRS pin, and the CRS de-assertion directly follows the TXEN de-assertion.
SQE disable
: Default 0. When asserted, it disables SQE pulses when operating in 10BASE-
T half-duplex mode.
Table 26.
RN1B [0d27, 0x1B]: Auxiliary mode 2 register
Bit
Bit name
Description
Default
RW
Type
Type
15:12
RESERVED
--
0000b
RO
-
11:10
RESERVED
--
00b
RW
-
9
LED Mode
1 ->
led_link pad: ON for link_up, BLINK for activity
led_speed pad: ON for 100 Mb, OFF for 10 Mb
led_act pad: ON for full-duplex, BLINK for collision
0 ->
led_link pad: ON for link_up
led_speed pad: ON for 100 Mb, OFF for 10 Mb
led_act pad: BLINK for activity
0
RW
-
8
RESERVED
---
0
RO
P
7
Block 10Base-
T echo
1 -> Disables 10Base-T echo data on RX_DV
0 -> Normal operation
0
RW
-
6:4
RESERVED
---
000b
RW
-
3
MI_SQE_DIS
0 -> Forces signal quality error generation (10Base-T,
half-duplex)
1 -> Normal operation
1
RW
-
2:1
RESERVED
---
01b
RW
-
0
RESERVED
---
0
RO
P
