RM0345
Calibration software compatibility and configuration
Doc ID 024080 Rev 3
23/38
Note:
1
The P/A/G column indicates the position a signal occupies in the muxing order for a pin:
Primary, Alternate 1, Alternate 2, Alternate 3, or GPIO. Signals are selected by setting the
PA field value in the appropriate PCR register in the SIU module. The PA field values are as
follows: P - 0b0001, A1 - 0b0010, A2 -0b0100, A3 - 0b1000, or G - 0b0000. Depending on
the register, the PA field size can vary in length. For PA fields having fewer than four bits,
remove the appropriate number of leading zeroes from these values.
2
The Pad Configuration Register (PCR) PA field is used by software to select pin function.
3
Values in the PCR No. column refer to registers in the System Integration Unit (SIU). The
actual register name is “SIU_PCR” suffixed by the PCR number.
9.1.2
Cal Bus ECCR Settings
The SIU ECCR registers used to control the timing relationship between the system clock
and the external clock CLKOUT.
The external bus clock (CLKOUT) divider can be programmed to divide the system clock by
one, two or four based on the settings of the EBDF bit field.
C_CS[3]
CAL_CS[3]
Calibration
chip select
P
1
339
CAL_ADDR[11]
Calibration
address bus
A
0
C_OE CAL_OE
Calibration
Output enable
-
-
342
C_RD_WR CAL_RD_WR
Calibration
Read/write
-
-
342
C_WE[0:1] CAL_WE[0:1]
Calibration
write/byte
enable
-
-
342
C_TS
CAL_TS
Calibration
transfer start
P
1
343
CAL_ALE
Address Latch
enable
A
0
Clock Synthesizer (1)
C_CLKOUT CLKOUT
System clock
output
P
01
229
Clock output
signal from MCU
Table 11.
Calibration bus signals configuration (continued)
signal name
SPC563M64xx
mcu signal name
Function
P
A
G
(1)
PCR
PA
field
(2)
PCR
(3)
Notes
Table 12.
EBDF field definition
Register
EBDF field
External Bus Division Factor
SIU_ECCR
00
1
01
2
10
reserved
11
4
