![ST NUCLEO-H745ZI-Q User Manual Download Page 33](http://html1.mh-extra.com/html/st/nucleo-h745zi-q/nucleo-h745zi-q_user-manual_1355929033.webp)
UM2408 Rev 1
33/45
UM2408
Hardware layout and configuration
44
SB72 (MCO)
ON
MCO of ST-LINK (STM32F723IEK6) is connected to PF0/PH0 of
STM32H7.
OFF
MCO of ST-LINK (STM32F723IEK6) is not connected to PF0/PH0 of
STM32H7.
SB3, SB4 (external
25M crystal)
OFF
PH0 and PH1 are not connected to external 25MHz crystal X2.
ON
PH0 and PH1 are connected to external 25MHz crystal X2.
SB83 (VBAT)
ON
VBAT pin of STM32H7 is connected to VDD_MCU.
OFF
VBAT pin of STM32H7 is not connected to VDD_MCU.
SB82, SB81 (B1-
USER)
ON, OFF
B1 push-button is connected to PC13.
OFF,ON
B1 push-button is connected to PA0 (Set SB82 OFF if ST Zio connector
is used).
OFF,OFF
B1 push-button is not connected.
SB89 (PA0)
ON
PA0 is connected to ST Zio connector (Pin 29 of CN10)
OFF
PA0 is not connected to ST Zio connector (Pin 29 of CN10)
SB69,SB40 (ADC
on A4 & A5)
SB62, SB39 (I2C on
A4 & A5)
ON, ON,
OFF, OFF
PC2, PF11 (ADC) are connected to A4 and A5 (pin 9 and 11) on ST Zio
connector CN9.
OFF, OFF,
ON, ON
PB9 and PB8 (I2C) are connected to A4 and A5 (pin 9 and 11) on ST
Zio connector CN9.
SB73,
SB70 (A6)
ON, OFF
PF6 connected to ZIO A6 (H745)
OFF, ON
PC1 connected to ZIO A6
SB93,
SB58 (A7)
ON, OFF
PF10 connected to ZIO A7 (H745)
OFF, ON
PC5 connected to ZIO A7
SB78
(A8)
ON
PA2 connected to ZIO A8
OFF
PA2 disconnected from ZIO A8 (H745)
RMII Signals
SB80 (PA1), SB84
(PC1), JP7 (PA2),
SB63 (PC4), SB48
(PC5), SB46
(PG13), SB36
(PG11)
ON
These pins are used as RMII signals and connected to Ethernet PHY.
These ports must not be used on ST morpho or ST Zio connectors.
OFF
These pins are used as GPIOs on ST morpho connectors and not
connected to Ethernet PHY.
RMII Signals
SB98 (Ethernet
nRST)
ON
NRST of STM32H7 is connected to Ethernet PHY (U15).
OFF
NRST of STM32H7 is not connected to Ethernet PHY (U15).
SB26 (PA12), SB27
(PA11)
ON
These pins are used as D+ and D- on USB connector CN13.
OFF
These pins are used as GPIOs on ST morpho connectors.
1. Default SBx state is shown in bold.
Table 16. Solder bridges (continued)
Bridge
State
(1)
Description