UM1499
Functional description
Doc ID 022592 Rev 1
7/29
Signal termination
A parallel termination is added on the clock lines to compensate, if needed, for the layout
dissymmetry. Two 100k ohm resistors are used for each line in order to obtain an impedance
of 50 ohms. All the other terminations are directly inside the pads (both on the SPEAr320S
MPU and the memory sides).
2.2
Static memory subsystem (Serial Flash memory)
The SPEAr320S MPU supports up to 16 Mbytes of Serial Flash memory. Place and route
for 2 blocks of 8 Mbytes are provided on the board, but only one is populated. It is based on
an M25P64-VMF6P (Numonix) Serial Flash memory device.
Resistor R8 protects the Flash memory from any unwanted write access.
2.3
USB 2.0 subsystem
Host ports
The board has two host ports that are fully compliant with the USB 2.0 specification (two
controllers with one port each). This means that the two hosts can work in concurrent mode
with the maximum possible bandwidth. Each host has also full control of the VBUS supplied
by the ST2052 power switch that also provides over current protection in case of a short
circuit in the USB cable.
Device port
The board has one USB 2.0 device port.
2.4 Debug
interface
The JTAG interface can be used for
static
debugging, which means that it is possible to set a
breakpoint, and when the system stops, verify the contents of the memory or registers, or
both, and modify them if needed.
To select the debug feature, set Switch SW1 bits [2:1].
For more information on the ETM interface, refer to the trace box manufacturer’s
documentation (www.lauterbach.com, www.agilent.com, www.yokogawa.com).
Table 1.
Switch SW1 bits [2:1]
Bit 2
Bit 1
Description
0
0
No debug features available
0
1
The ARM JTAG is connected to J4
