Installation and Instruction Manual - Series 230
Page 5
118128-001 Rev A
3
Enable/Disable. Input logic zero disables high
voltage generation. Open circuit or input
logic one enables high voltage generation.
4
Pre5Vdc reference output referenced
to analog ground.
5
Output current monitor, buffered, 0 to +5Vdc
(output impedance 10k
:
)
6
Remote analog voltage programming input, 0
to +5Vdc
7
Analog Ground
8
Digital Ground
9
Polarity Indicator
REMOTE ANALOG MONITORING:
Buffered, analog output monitors, 0 to + 5Vdc,
linearly proportional to the power supply's
voltage and current output are provided. To
monitor the output voltage, connect a high
impedance meter to pin 1 and pin 7 (ground). To
monitor the output current, connect a high
impedance meter to pin 5 and pin 7 (ground).
The accuracy of the voltage and current
monitors is given in the specifications (see page
12). The monitor output impedance is
approximately 10k
:
.
ENABLE/DISABLE:
A TTL level logic TRIP input signal can be used
to enable or disable the power supply output
remotely. Input logic zero or grounding pin 3
disables high voltage generation. Open circuit or
input logic one on pin 3 enables high voltage
generation.
+5Vdc REFERENCE OUTPUT:
A pre5Vdc reference output is provided
on pin 4 for the user’s convenience. This fixed
output can be used for remote resistance
programming (see REMOTE
PROGRAMMING, above) or various control
functions. This output is referenced to analog
ground (pin 7).
POLARITY INDICATOR:
A TTL polarity indicator output signal is
available at pin 9. An NPN open collector
connection with respect to digital ground
indicates the high voltage output polarity. NPN
saturation denotes positive polarity.
2.8 COMPUTER PROGRAMMING
(Optional)
GENERAL:
All Series 230 instruments can be provided with
a factory-installed option for remote digital
programming of the high voltage output. The
programming inputs are TTL compatible and the
data is positive logic (all data bits low yield 0
high voltage output). The addition of this option
allows the unit to be easily interfaced to any
computer or microprocessor utilizing one of its
three user selectable modes of operation.
16 Bit Transparent
: The 16 bit data is passed
from the inputs directly to the DAC. This is the
default mode (is 100% compatible with all
previous CBNY digital programming boards).
16 Bit Register
: The 16 bit data is latched into an
internal 16-bit register in one write cycle.
8 Bit Register
: Two 8-bit bytes (Most
Significant Byte and Least Significant Byte) are
latched into two 8-bit registers. The MSB and
LSB registers are individually addressed and
written. This allows an 8 bit data bus system to
provide 16 bit programming in two write cycles.
The register modes utilize standard Chip Select
and Write Enable protocol allowing the CBNY
to act as a memory mapped register or an I/O
port attached directly to an 8 or 16 bit
microprocessor system bus. In addition, any
standard unit in the Series 230 can be computer
programmed and monitored using the Bertan B-
HiVE minicomputer controlled enclosure with
the appropriate interface module. Remote TTY
or RS-232C control at selectable 110 to 9600-
baud rate is possible. A separate IEEE-488
interface is also available for use with the Series
205B high voltage power supplies. See the
Model 200-C488 data sheet for complete
information.
FUNCTIONAL DESCRIPTION:
Connector J3 (Amphenol 57-40240) accepts the
remote binary coded inputs and is located on the
rear panel. When the REMOTE/LOCAL switch
is in the REMOTE DIGITAL position, control
of the unit is dependent upon the digital signals
present at Pin 2 through Pin 17 of J3. Pin 2 is
for the most significant bit, with increasing pin
numbers having lower significant bits. Pin 17 is
the least significant bit input. Positive logic is
