6.9.1.4
Local/μC Bus FIFO Overflow
This interrupt is driven when the FIFO from the local bus to the microcontroller bus is over
flowed. It is based on the rising edge of the FIFO’s overflow flag.
6.9.1.5
μC/local bus FIFO Data Available
This interrupt is driven when the FIFO from the microcontroller bus to the local bus is no longer
empty. It is based on the falling edge of the FIFO’s empty flag.
6.9.1.6
μC/local bus FIFO Overflow
This interrupt is driven when the FIFO from the microcontroller bus to the local bus is over
flowed. It is based on the rising edge of the FIFO’s overflow flag.
6.9.1.7
GPIO Input x Event
This interrupt is driven when the active edge of the GPIO input signal is received.
6.9.1.8
GPIO Output x Event
The interrupt is driven when an event occurs in the GPIO output. An event depends on the mode
of operation of the GPIO output. In Direct mode, an event is triggered when the output Value in
the GPIO output control / status register is changed and creates the active edge selected by the
GPIO direct mode output interrupt active edge bit in that same register. This can be used to gen
erate a “software” interrupt by setting the GPIO output appropriately. In match time mode, an
interrupt is generated whenever the GPIO output high match time or GPIO output low match
time registers are enabled and subsequently matched against the current system time. In square
wave mode, an interrupt is generated whenever the GPIO output generates the active edge as
selected by the GPIO output square wave active edge bit in the GPIO output control / status
register. This can be used to generate a periodic interrupt at the rate of the square wave.
6.9.1.9
Time Stamp Data Available
This interrupt is driven when the time stamp FIFO goes non-empty. Time stamp data is available
in the time stamp FIFO when this interrupt occurs.
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6.9 Interrupts
Summary of Contents for TSync-PCIe
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