BIOS Setup Utility
SY-6VBA 133
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CHIPSET FEATURES SETUP
CHIPSET
FEATURES
Setting
Description
Note
SDRAM 10ns
SDRAM 8ns
Normal
Medium
Fast
DRAM Timing
Turbo
Choose DRAM Timing
Default
Disabled
Default
Memory Hole
15M -16M Some interface cards will map
their ROM address to this area.
If this occurs, select 15M –
16M in this field.
Disabled
Default
Read Around
Write
Enabled
DRAM optimization feature:
If a memory read is addressed
to a location whose latest write
is being held in a buffer before
being written to memory, the
read is satisfied through the
buffer contents, and the read is
not sent to the DRAM.
Disabled
When disabled, CPU bus will
be occupied during the entire
PCI operation period.
Default
Concurrent
PCI/Host
Enabled
Disabled
Default
System BIOS
Cacheable
Enabled
Selecting
Enabled
allows
caching of the system BIOS
ROM at F0000h-FFFFFh,
resulting in better system
performance. However, if any
program writes to this memory
area, a system error may result.
Disabled
Default
Video RAM
Cacheable
Enabled
The ROM area A0000-BFFFF
is cacheable.
Summary of Contents for SY-6VBA 133
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