32
ZS-Y3
Pin No.
Pin Name
I/O
Description
1
VCC
—
Power supply terminal (+3.3V)
2 to 4
SIMUKE1 to SIMUKE3
I
Destination setting terminal
5
TEST-A
I
Test mode setting terminal Normally fixed at “H”
6
BATT-CHK
—
Not used
7 to 10
NC
—
Not used
11
CD-DOOR
I
CD lid open/close detection switch input terminal “L”: CD lid is close
12
AC-CHK
I
AC voltage detection signal input terminal “L”: AC detected
13 to 15
NC
—
Not used
16
3.3V-MONITOR
I
CD voltage (+3.3V) detection signal input terminal
17
CD-WRQ
I
Interruption detection signal input from the digital signal processor
18
NC
—
Not used
19
RMC-IN
I
Remote control signal input terminal
20, 21
NC
—
Not used
22
CD-RES
O
System reset signal output to the digital signal processor “L”: reset
23
CD-CE
O
Chip enable signal output to the digital signal processor
24
CD-DRF
I
Focus on/off detection signal input from the digital signal processor
25
CD-FSEQ
I
Synchronizing signal detection signal input from the digital signal processor
26
CD-DIN
O
Serial data output to the digital signal processor
27
CD-DOUT
I
Serial data input from the digital signal processor
28
CD-CLK
O
Serial data transfer clock signal output to the digital signal processor
29
AVR
—
Not used
30
AVCC
—
Power supply terminal (+3.3V)
31
AGND
—
Ground terminal
32 to 34
KEY1 to KEY3
I
Key input terminal (A/D input)
35, 36
NC
—
Not used
37
BTT-CHK-H
I
Battery high voltage detection input terminal
38
BTT-CHK-M
I
Battery middle voltage detection input terminal Not used
39
V-CHECK
O
Power supply voltage detection signal input terminal for the electrical volume
40 to 42
NC
—
Not used
43
V-CLK
O
Serial data transfer clock signal output to the electrical volume
44
V-DATA
O
Serial data output to the electrical volume
45
NC
—
Not used
46
SCL
O
Serial clock signal output terminal to the EEPROM
47
SDA
I/O
Two-way serial data bus with the EEPROM
48
X1A
O
Sub system clock output terminal (75 kHz)
49
X0A
I
Sub system clock input terminal (75 kHz)
50
VSS
—
Ground terminal
51
VDD
—
Power supply terminal (+3.3V)
52 to 54
V3 to V1
—
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive
voltage
55 to 58
COM0 to COM3
O
Common drive signal output to the liquid crystal display
59 to 75
S0 to S16
O
Segment drive signal output to the liquid crystal display
76 to 78
NC
—
Not used
79
PL-CONT
O
Trigger plunger drive signal output “H”: plunger on
80
BACK-LIGHT
O
LCD back light on/off control signal output terminal “H”: LED ON
81
M-BASS
O
MEGA BASS on/off control signal output terminal “H”: active
82
P-CON
O
Power control signal output terminal “H”: active
• IC Pin Function Description
MAIN BOARD IC802 MB89498PF-G-102-BNDE1 (SYSTEM CONTROLLER)
