XVM-B62
15
15
XVM-B62
6-1. BLOCK DIAGRAM — VIDEO SECTION —
SECTION 6
DIAGRAMS
63
64
13
40
14
43
22
2
20
1
19
3
16
17
23
18
48
14
16
15
17
16
18
17
15
63 64
47
54
34
39
35
46
57
7
1
3
5
2
4
52
53
VCO
I/N
VXO
RGB DECODER,
VIDEO PROCESSOR
IC501
V SYNC SELECT
IC503
SYSTEM CONTOL
IC401 (1/2)
Q503
TRAP
CN401
VD IN
SYNC
SEP
HH
KILL
V
COUNT
OSD
SW
OUTPUT
CONTROL
VIDEO RAM
CG
ROM
OSC
BRIGHT/
CONTRAST
SYNC
SEPARATOR
Q501,502
IC102
VIDEO SELECT
VD PULSE
SHAPE
Q505,512,513
C SYNC
BUFFER
IC804
H PULSE
SHAPE
Q506,507
DELAY
SWITCH
Q551
INVERT
RGB
OUT
G-Y
GEN
BPF/
ACC
R-Y/B-Y
DEMOD
MATRIX
26
21
19
36
28
31
32
5
3
7
1
H
COUNT
V
COUNT
DATA
SELECT
20
4
19
SW
SYNC
OUT
DELAY/
SHARP
6
5
CHARACTER GENERATER
IC751
HD
VIY
VD
RED
GREEN
BLUE
POL
VCOM
N/P
HDOUT
VDOUT
R-OUT
G-OUT
B-OUT
POL
HSYNC
PCL
VSYNC
VCOM
SW1
62 SW2
PARKING
DATA
SCLK
CS
Y IN
V-SDA
V-SCK
C IN
VIN1
VO
VIN2
VIN3
SW2
SW1
CSYNCIN
HSYNCLOCK
SDA
SCL
X2
41 X1
1 TEST
27 KEY IN
45 KEYHALT
RESET
3V
WRITING
FLASH ROM
SI
SCK
SO
VPP
SYNC DET/SO
36
RESET
39
FLASH
VSYNC
OSD CS
OSD CLK/SCK
OSD DATA/SI
SCK
SDATA
N/P
EEPROM
IC403
2
1
RESET
IC402
CN1001
CVBS2
SDA
SCL
PARKING
ACC
ACC
ACC
GND
GND
CVBS1
1
3
9
5
6
7
8
R-IN2
S-DATA
S-CLK
CSYNC
G-IN2
B-IN2
YS
VR
VG
VB
VBLK
X501
3.579545MHz
X502
4.433619MHz
2
1
3
X401
4.19MHz
S408
(TEST)
S401
POWER
S402
MENU
S403
S404
INPUT/–
1
3
5
4
2
VDD3.3V
DELAY
Q514
6
2
Signal path
: VIDEO
(Page 16)
(Page 16)
(Page 16)
