STR-DN840
64
Pin No.
Pin Name
I/O
Description
70
WDTRSTO
O
Watchdog timer reset output terminal Not used
71
NC
-
Not used
72
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
73
SL/SR_OUT
O
Audio signal output to the DSP2
74
SL/SR_IN
I
Audio signal input terminal
75
BCLK_IN
I
Bit clock signal input terminal
76
OPTION_L/
OPTION_R_OUT
O
Audio signal output to the DSP2
77
FRONTHI_L/R_OUT
O
Audio signal output to the DSP2
78
VDD_INT
-
Power supply terminal (+1.2V) (for core)
79 to 83
NC
-
Not used
84
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
85
VDD_INT
-
Power supply terminal (+1.2V) (for core)
86
L/R_OUT
O
Audio signal output to the DSP2
87
MID/SW2_OUT
O
Audio signal output terminal Not used
88
SBL/SBR_OUT
O
Audio signal output to the DSP2
89
ZONE_L/R
O
Not used
90
VDD_INT
-
Power supply terminal (+1.2V) (for core)
91
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
92
MCLK_IN
I
Master clock signal input from the frequency multiplier
93
VDD_INT
-
Power supply terminal (+1.2V) (for core)
94
C/SW1_OUT
O
Audio signal output to the DSP2
95
C/SW_IN
I
Audio signal input terminal
96
A/D_2CH
I
Audio signal input terminal
97
LRCLK_IN
I
L/R sampling clock signal input terminal
98
BCLK_OUT
O
Bit clock signal output to the DSP2
99
LRCLK_OUT
O
L/R sampling clock signal output to the DSP2
100
L/R_IN
I
Audio signal input terminal
101
SBL/SBR_IN
I
Audio signal input terminal
102
VDD_INT
-
Power supply terminal (+1.2V) (for core)
103
DIR_IN
I
Audio signal input terminal
104
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
105
VDD_INT
-
Power supply terminal (+1.2V) (for core)
106
BOOT_CFG2
I
Boot mode selection signal input terminal Fixed at “L” in this unit
107
VDD_INT
-
Power supply terminal (+1.2V) (for core)
108
AMI_ACK
I
Memory acknowledge terminal Not used
109
GND
-
Ground terminal
110
THD_M
O
Thermal diode cathode output terminal Not used
111
THD_P
I
Thermal diode anode input terminal Not used
112
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
113, 114
VDD_INT
-
Power supply terminal (+1.2V) (for core)
115
MS1
O
Memory select terminal Not used
116
VDD_INT
-
Power supply terminal (+1.2V) (for core)
117
WDT_CLKO
O
Watchdog resonator pad output terminal Not used
118
WDT_CLKIN
I
Watchdog timer clock input terminal Fixed at “L” in this unit
119
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
120 to
122
ADDR23 to ADDR21
O
Address signal output terminal Not used
123
VDD_INT
-
Power supply terminal (+1.2V) (for core)
124, 125
ADDR20, ADDR19
O
Address signal output terminal Not used
126
VDD_EXT
-
Power supply terminal (+3.3V) (for I/O)
127, 128
ADDR16, ADDR15
O
Address signal output terminal Not used
129
VDD_INT
-
Power supply terminal (+1.2V) (for core)
130
ADDR14
O
Address signal output terminal Not used
131
AMI_WR
O
AMI port write enable terminal Not used
132
AMI_RD
O
AMI port read enable terminal Not used
Summary of Contents for STR-DN840
Page 99: ...MEMO STR DN840 99 ...
