STR-DG910
22
22
STR-DG910
5-6. BLOCK DIAGRAM — KEY/DISPLAY SECTION —
57
FL DISPLAY DRIVER
IC100
14
I
29
•
31
58
98
78
5
6
16
15
82
SW NETWORK
S101-108
RV102
MASTER
VOLUME
D105
MULTI
CHANNEL
DECODING
85
52
103
102
55
12.5MHz
12.5MHz
EEPROM DATA
EEPROM CLK
POWERKEY
FLASH_SO/HDMI_UART_TX
FLASH_SI/HDMI_UART_RX
MD2
INIT
62 RST TGR
SDA
SCL
EEPROM
IC1131
X1300
12.5MHz
SIRCS IN
F1
F2
71
FL_DATA
7 DIN
68
FL_LAT
9 STB
70
FL_CLK
8 CLK
1
SW1
GRID1
I
GRID11
SEG1
I
SEG17
V_ENCODER(A)-DOWN
V_ENCODER(B)-UP
INPUT ENCODER A
INPUT ENCODER B
A/D KEY2
SW NETWORK
S109–115
A/D KEY1
2
3
79
80
RV101
INPUT
SELECTOR
2
3
TUNING /- A
TUNING /- B
36
37
RV103
–
2
3
TONE JOG A
TONE JOG B
6
5
RV104
– TONE +
2
3
2
REMOTE
CONTROL
SIGNAL
RECEIVER
IC103
OUT
SIRCS
SYSTEM
CONTROL
IC1010 (6/7)
BUFFER
IC101
CNS504
S100
FLASH-SI
MD2
XRESET
1
2
SDA
SCL
FLASH-SO
9
8
7
5
FLASH
PROGRAMMING
I
/ I
114
115
FL101
VACUUM
FLUORESCENT
DISPLAY
42
I
32
9
4
2
8
6
3
IC1005–1007
LED
DRIVER
Q110
RESET
Summary of Contents for STR-DG910
Page 105: ...105 STR DG910 MEMO ...