85
STR-DA3100ES
DIGITAL BOARD IC2601 MB91F155A-5ES-X101 (MAIN SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DSP HCLK
O
Serial data transfer clock signal output to the DSP1
2
DSP HDIN
O
Serial data output to the DSP1
3
1BST SEL
O
Signal selection signal output terminal “L”: boot strap signal, “H”: L/R sampling
clock signal
4
1XRST
O
System reset signal output to the DSP1 “L”: reset
5
1PM
O
PLL initialize signal output to the DSP1
6
1GP9
I
Read ready signal input from the DSP1
7
1BST
O
Boot strap signal output to the DSP1
8
1HCS
O
Chip select signal output to the DSP1
9
VSS
–
Ground terminal
10
1HDOUT
I
Serial data input from the DSP1
11
1HACN
I
Acknowledge signal input from the DSP1
12
2XRST
O
System reset signal output to the DSP2 “L”: reset
13
2PM
O
PLL initialize signal output to the DSP2
14
2GP3
I
Error signal input from the DSP2
15
2BST
O
Boot strap signal output to the DSP2
16
2HCS
O
Chip select signal output to the DSP2
17
2HDOUT
I
Serial data input from the DSP2
18
2HACN
I
Acknowledge signal input from the DSP2
19
2EXLOCK
O
Lock signal output to the DSP2
20
DIR-XMODE
O
System reset signal output to the digital audio interface receiver
21
DIR-CKSEL
O
Clock selection signal output to the digital audio interface receiver
22
NC
–
Not used
23
DIR-CE
O
Chip enable signal output to the digital audio interface receiver
24
DIR-DO
I
Read data input from the digital audio interface receiver
25
DAC MUTE
O
System muting on/off control signal output terminal “H”: muting on
26
VSS
–
Ground terminal
27
VCC
–
Power supply terminal (+3.3V)
28
DIR-ERROR
I
PLL lock error signal and data error flag input from the digital audio interface receiver
29
DIR-DATAO
I
Audio serial data input terminal
30
DIR-XSTATE
I
Source clock selection monitor input from the digital audio interface receiver
31
TA_XCS
O
Chip select signal output to the lip sync adjust
32
TA_SO
I
Serial data input from the lip sync adjust
33
TA_XRST
O
System reset signal output to the lip sync adjust
34
MAIN
O
Trigger out signal output terminal (for MAIN)
35
2ND
O
Trigger out signal output terminal (for 2ND)
36
3RD
O
Trigger out signal output terminal (for 3RD)
37
O595 LAT
O
Serial data latch pulse output to the data decoder
38
O595 OE
O
Output enable signal output to the data decoder
39
DCOM CLK
O
Serial data transfer clock signal output to the digital audio interface receiver, lip sync
adjust and D/A converter
40
DCOM DATA
O
Serial data output to the digital audio interface receiver, lip sync adjust and D/A
converter
41
COM CLK
O
Serial data transfer clock signal output to the input select, electrical volume, data
decoder and tuner unit
42
COM DATA
O
Serial data output to the input select, electrical volume, data decoder and tuner unit
43
V595OE
O
Output enable signal output to the data decoder
44
VSS
–
Ground terminal
45
V595LAT
O
Serial data latch pulse output to the data decoder
Summary of Contents for STR-DA3100ES - Fm Stereo/fm-am Receiver
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