Sony RHT-G1000 - Home Theater Built-in Sound Rack System, Service Manual

Page: 19 / 62

19 19
RHT-G1000
RHT-G1000
4-8. SCHEMATIC DIAGRAM – MAIN BOARD (5/8) –
IC509
R765
R764
R763
R762
R761
R760
R704
R703
C525
C595
C598
C602
D503
D506
D505
R609
R673
C583
R659
R662
R775
C875
D504
R657
C580
C587
C589
R678
R514
R675
X502
R713
C716
C712
R719
R717
R709
R731 R724 R723 R705
R726
R728
C798
C799
C570
R612
C571
R577
C572
R789
R790
R791
R614
R616
R792
R792
R702
C701
R774
R524
R595
R536
R591
R594
R590
R589
R588
R587
R586
R585
R625
R706 R628
C608
R608
R707
R601 R620
C762
C856
R624
R745 R756
R743
R746
R741
R729
R730
R748
R749
R750
CN509
CN507
CN510
IC515
IC516
C596
C597
C601
C603
EB905
R739
Q506
IC511
R611
C582
M30622MEP-A52FPU0
100
100
100
100
100
100
1k
1k
0.1
0.1
1
0.1
1SS355TE-17
1SS355TE-17
1SS355TE-17
0
10k
0.22
100k
47k
47k
0.01
1SS355TE-17
47k
2200
6.3V
0.22
0.1
0
1k
100
5MHz
0
0.1
0.1
10k
10k
10k 100 100 100 10k
R720
10k
1k
1k
0.1
0.1
0.1
10k
0.1
22k
0.1
100
R793
47k
100
100
10k
10k
4.7k
15k
47k
US, CND, KR
R596
47k
10k
0.1
1k
10k
R718
US, CND, KR
10k
R777
10k
R721
10k
100
1k
R535
1k
100
100
100
1k
100
100
100
100
100
100
1k 100p
100
100
100 100
0.1
0.1
10k
100 1k
10k
47k
47k
4.7k
R592
10k
R593
10k
4.7k
1k
1k
1k
19P
23P
8P
TA7809LS
TA7805LS
47
35V
1
47
35V
100
10V
47k
2SC1623-L5L6
INVERTER
PST3629NR
10k
100
10V
A5V
D3.3V
DSP_PM
DIR_RERR
DIR_ZERO
DSP_GP9
DSP_BST
DSP_DO
DSP/DIR_DIN
DIR_DO
DIR_HCE
DIR_CSFLAG
DIR_XSTAE
DSP_ACK
DSP_XRST
DSP_HCE
DSP/DIR_CLK
DIR_RST
A-GND
DSP_SKIP
RIN
LIN
AD_RST
OVF2 OVF1
DIAG
RESET
LAT3 LAT2 LAT1
SHIFT
SCDT
SOFT_MUTE
NS_INIT
12V
3.3V
E4V
D-GND
OPT-IN
AGND
P.CONT2
P.CONT1
M-8V
GND_EB903
D.DCON5V
RY_REAL
SW_REAL
BYPASS
DIR/AD
KEY0
EN
DIAG LAT2
SHIFT
SCDT
KEY1
KEY2
DSP_HCE DSP_BST
DSP_PM
DIR_HCE
KEY1 KEY2
NS_INIT
ERR GP9
LAT3 LAT1
DIR_RST
DSP_XRST
ACK
SOFT_MUTE
OVERFLOW1 OVERFLOW2
RESET
KEY0
DIR_HCE
CSFLAG
ERR
DIR_ZERO
DIR_RST
DSP_HCE
DSP_XRST
ACK
DSP_PM
GP9
DSP_BST
DSP_DO
AD_RST
AD_RST
SOFT_M
UTE
NS_INIT
LAT1 LAT2 LAT3
OVERFLOW1
OVERFLOW2
DIAG
EN
DIR_ZERO
RESET
CNVSS
CNVSS
PLL_CE
PLL_DO
PLL_DI
TUNED
PLL_CLK
SEL0
SEL1
SEL2
SEL3
CSFLAG
HDOUT
HDOUT
SKIP
SKIP
DSP_DO
SHIFT SCDT
SIRCS
SIRCS
SCO/CLK1
SCO/CLK1
SOD/RXD1
SID/TXD1
SOD/RXD1
SID/TXD1
DIR_XSTAE
DIR_XSTAE
D_CLK
D_CLK
DIN
DIN
P-CONT1
P-CONT2
P-CONT1
P-CONT2
BUSY/RTS1
BUSY/RTS1
SW_REAL
RY_REAL
DIR/AD
BYPASS
BYPASS
DIR/AD
LED3
LED4
LED3 LED4
FL_RST
PLL_DI
PLL_CE
PLL_DO
PLL_CLK
TUNED
SEL3
SEL2
SEL1
SEL0
FL_CS FL_DATA FL_RST FL_CLK LED2 LED1
LED1
FL_CS FL_DATA FL_CLK LED2
RESET
+5V REG.
+9V REG.
BOARD
(1/2)
(Page 25)
BOARD
(Page 29)
FOR PROGRAM WRITER
IO
CNV
SYSTEM CONTROLLER
BOARD
MAIN
(Page 22)
(8/8)
BOARD
MAIN
(Page 20)
BOARD
MAIN
(Page 21)
BOARD
MAIN
(Page 22)
(6/8)
(7/8) (8/8)
BOARD
MAIN
(Page 15)
(1/8)
BOARD
MAIN
(Page 15)
(1/8)
BOARD
MAIN
(Page 21)
(7/8)
BOARD
MAIN
(Page 20)
BOARD
MAIN
(Page 21)
(6/8)
(7/8)
BOARD
MAIN
(Page 20)
(6/8)
*
*
KR
US, CND
AEP, UK
0
(1
.6
)
0
(1
.6
)
0
.2
3 . 3
0 ( 3 . 3 )
3 . 3 ( 0 )
1 . 4
9 . 1
• See page 8 for Waveforms. • See page 40 for IC Pin Function Description.
Ver. 1.2