48
RCD-W7V
6-20. IC PIN FUNCTION DESCRIPTION
Description
Pin Name
Pin No.
I/O
• IC401 HD6417034AF DVD SYSTEM CONTROL (BD BOARD (4/5))
1
DAV_DATA6
I
MPEG data (bit 6) input
2
DSP_INT
I
Interrupt signal input from DSP
3
VSS
—
Ground
4 to 11
HD0 to 7
I/O
Data input/output to SRAM
12
VSS
—
Ground
13,14
HD8,9
I/O
Data input/output to SRAM
15
VSS
—
Power supply (+3.3V)
16 to 21
HD10 to 15
I/O
Data input/output to SRAM
22
VSS
—
Ground
23 to 30
HA0 to 7
O
Address bus to SRAM
31
VSS
—
Ground
32 to 39
HA8 to 15
O
Address bus to SRAM
40
VCC
—
Ground
41,42
HA16, 17
O
Address bus to SRAM
43
VCC
—
Power supply (+3.3V)
44 to 47
HA18 to 21
O
Address bus to SRAM
48
/ROM_CS
O
Chip enable signal output to ROM
49
/CASH
O
CAS for higher byte output to DRAM
50
/IOCSI
I
Chip enable signal input from CPLD
51
/CASL
O
CAS for lower byte output to DRAM
52
VSS
—
Ground
53
V_MUTE
O
Video mute signal output
54
/RAS
O
RAS signal output to DRAM
55
REC_SIO_EN
O
SIO enable output to CDP
56
/MICOM_WAIT
I
MICOM wait signal input
57
/WR
O
Data write signal output
58
E_SOUT
I
Serial data input
59
/RD
O
Data read signal output
60
DSP_SENSE
I
SENSE signal input to DSP
61
VSS
—
Ground
62
E_SIN
O
Serial data output
63
E_CLK
O
Clock signal output
64
/MPEG_WR
O
MPEG host I/F read/write signal output
65
M_REQ
O
Serial data request output to FLD
66
FPGA_AS
O
FPGA address strobe signal output
67
/STROBE
I
Flash download I/F signal
68
SENS
I
SENS signal input to DSP
69
MPEG_INT
I
Interrupt signal input from MPEG
70
VCC
—
Power supply (+3.3V)
71
CK
O
Not used
72
VSS
—
Ground
73
X1
I
External crystal terminal (20MHz)
74
X0
O
External crystal terminal (20MHz)
75
VCC
—
Power supply (+3.3V)
76
PWR_FAIL_IN
I
Power fail signal input
77
VCC
—
Power supply (+3.3V)
78
/WDTOVF
O
Watch dog timer over flow output (Not used)
79
/RES
I
Reset signal input
