50
MV-900SDS
LCD BOARD IC401
µ
PD780023AGK-C36-9ET-A (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
TEST
I
Test mode setting terminal “H”: test mode, normally fixed at “L”
2
PW-ON
O
Power on/off control signal output for main power “H”: power on
3
FM-SCK
O
Serial data transfer clock signal output to the FM modulator
4
FM-DATA
O
Serial data output to the FM modulator
5
FM-CE
O
Chip enable signal output to the FM modulator
6
S-SCL
O
Serial data transfer clock signal output to the electrical volume
7
S-SDA
O
Serial data output to the electrical volume
8
FAN CONT
O
Fan motor drive signal output terminal “H”: fan on
9
VSS
—
Ground terminal
10
VDD1
—
Power supply terminal (+3.3V)
11
LIGHT PW/EJ
O
LED drive signal output for POWER and EJECT key illumination “L”: LED on
12
DISC_LED
O
LED drive signal output for DISC IN indicator “L”: LED on
13
SDA
I/O
Two-way data bus with the EEPROM
14
SCL
O
Serial data transfer clock signal output to the EEPROM
15
DA (IN)-BE
I
Serial data input from the DVD mechanism deck block
16
DA (OUT)-BE
O
Serial data output to the DVD mechanism deck block
17
CK-BE
O
Serial data transfer clock signal output to the DVD mechanism deck block
18
CS-BE
O
Chip select signal output to the DVD mechanism deck block
19
OSD DATA
O
Serial data output to the OSD driver
20
OSD CLK
O
Serial data transfer clock signal output to the OSD driver
21
SYNC-DET
I
Sync detection signal input from the RGB decoder
“L”: reflection is detect, “H”: reflection is not detect
22
OSD CS
O
Chip select signal output to the OSD driver
23
N/P
O
NTSC/PAL selection signal output terminal “L”: PAL, “H”: NTSC
24
VDD2
—
Power supply terminal (+3.3V)
25
AVSS
—
Ground terminal (for A/D converter)
26
XIR
—
Not used
27
KEY IN
I
Front panel key input terminal (A/D input)
28
KEY-DVD
I
Monitor panel key input terminal (A/D input)
29
KEY PW/EJ
I
Front panel key input terminal
30
MONITOR SW
I
Panel close detection switch input terminal “L”: close
31
ACC Y/N
I
Power select switch input terminal “H”: A position (use accessory position)
32
PW DET
I
Over voltage (more than 1.8V) and low voltage (less than 1.0V) detect terminal
33
TEMP
I
Temperature detection signal input terminal
34
AVREF
I
Reference voltage (+3.3V) input terminal (for A/D converter)
35
AVDD
—
Power supply terminal (+3.3V) (for A/D converter)
36
RESET
I
System reset signal input from the reset signal generator or reset switch “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
37
XT2
O
System clock output terminal Not used
38
XT1
I
System clock input terminal Not used
39
IC
I
Connected to the ground
40
X2
O
System clock output terminal (4.19 MHz)
41
X1
I
System clock input terminal (4.19 MHz)
42
VSS1
—
Ground terminal
43
VD
I
Vertical sync signal input from the RGB decoder
Summary of Contents for MV-900SDS - Dream System 3
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