41
MV-900SDS
IC7
PCM1751DBQR
•
IC Block Diagrams
– MAIN Board –
SCK
1 2 3
7 8
4
5
6
SERIAL
INPUT
INTERFACE
10
9
BCK
DATA
LRCK
VOUTL
VOUTR
DGND
VDD
VCC
VCOM
AGND
FUNCTION
CONTROL
INTERFACE
SYSTEM
CLOCK
MANAGER
8 TIME OVER
SAMPLING
DIGITAL FILTER
WITH
FUNCTION
CONTROLLER
ENHANCED
MULTI-LEVEL
DELTA-SIGMA
MODULATOR
D/A
CONVERTER
D/A
CONVERTER
OUTPUT AMP AND
LOW-PASS FILTER
OUTPUT AMP AND
LOW-PASS FILTER
ZERO DETECT
POWER SUPPLY
12
11
ZEROL
ZEROR
15
14
ML
MC
16
13
MD
SYSTEM
CLOCK
IC101
MM1508XNRE
1
SW
2
OUT
3
VCC
6dB
DRIVER
BIAS
CLAMP
CLAMP
4 IN2
6 IN1
GND
5
IC102
NJM2283V-TE1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1X
A
X
GND
Y
Z
C
OZ
1Z
GND
0Y
B
VCC
1Y
GND
0X
+
–
+
–
PHASE
DETECTOR
22
21
20
19
18
17
16
15
14
13
12
1
2
3
4
5
6
7
8
9
10
11
L. P. F.
L. P. F.
SHIFT REGISTER
PROGRAM COUNTER
1
4
1
50
1
19
VCC
2
MUTE
MPX
OSC
0
+
1
2
RF
PRE-EMPHASIS
& LIMITER
L-CH INPUT
PRE-EMPHASIS TIME CONSTANT
LPF TIME CONSTANT
PILOT SIGNAL ADJUST
AUDIO MUTING
DATA
CLOCK
CHIP ENABLE
X'TAL OSCILLATOR
X'TAL OSCILLATOR
PLL VCC
R-CH INPUT
PRE-EMPHASIS TIME CONSTANT
LPF TIME CONSTANT
FILTER
COMPOSITE SIGNAL OUTPUT
GND
PLL PHASE DETECTOR OUTPUT
VCC
RF OSCILLTOR
RF GND
RF OUTPUT
IC201
BH1415F-E2
Summary of Contents for MV-900SDS - Dream System 3
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