Sony MDX-C8970, Service Manual

Page: 19 / 80

MDX-C8970
19 19
SECTION 4
DIAGRAMS
4-1. BLOCK DIAGRAM – SERVO Section –
F
C B
D A
E
I J
J
I
B
A
C
D
E
F
DETECTOR
1
2
J
I
4
5
6
7
A
B
C
D
8
9
E
F
LD PD
LASER DIODE
ILCC
PD
OPTICAL PICK-UP
(KMS-241B/J2N)
AUTOMATIC
POWER
CONTROL
Q302
11
10
APC
PD
LD/PD
AMP
12
APCREF
I-V
AMP
I-V
AMP
AT
AMP
B.P.F. 29 30
WBL
ADFM ADIN
32
ADFG
ABCD
AMP
FOCUS
ERROR AMP
TRACKING
ERROR AMP
35
34
26
28
ABCD
FE
TE
SE
V-I
CONVERTER
20
F0CNT
WBL 3T EQ
+3.3V
SERIAL/
PARALLEL
CONVERTER,
DECODER
COMMAND
17 16 18
SWDT
SCLK XLAT
RF AMP
B.P.F.
46
RFO
40
RF AGC
& EQ
AGCI
EQ
38
RF
RF AMP,
FOCUS/TRACKING ERROR AMP
IC302
TEMP
48 47
MORFO
MORFI
3T
PEAK &
BOTTOM
WBL
33
AUX
73 62
37
PEAK
36
BOTM
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC303
6
8
OUT4F
OUT4R
M
M901
(SPINDLE)
27
25
OUT2F
OUT2R
M
M902
(SLED)
21
23
OUT1F
OUT1R
12
10
OUT3F
OUT3R
FCS+
FCS–
TRK+
TRK–
2-AXIS
DEVICE
(TRACKING)
(FOCUS)
3
4
IN4R
IN4F
29
30
IN2F
IN2R
19
18
IN1F
IN1R
14
15
IN3F
IN3R
SPFD
SPRD
LEVEL SHIFT
IC306
92
91
88
89
86
85
83
APCREF
SFDR
SRDR
FFDR
FRDR
TFDR
TRDR
16 PSB
PWM GENERATOR
AUTOMATIC
POWER
CONTROL
DIGITAL
SERVO
SIGNAL
PROCESS
74 65 64 75 66 63
ANALOG MUX
A/D CONVERTER
AUTO
SEQUENCER
13
FROM CPU
INTERFACE
DIGITAL SERVO
SIGNAL PROCESSOR
IC301 (2/2)
RECP
PEAK HOLD
Q301
+3.3V
ABCD
AUX1 AUX2 ABCD
FE TE SE
PEAK BOTM
81
80
82
XLRF
CKRF
DTRF
EFM/ACIRC
ENCODER/DECODER
SHOCK PROOF
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
PLL
FILTER
59
58
61
60
FILI
PCO
CLTV
FILO
100
EFMO
23
ADDT
IC301 (1/2)
15
TX
COMPA-
RATOR
51
52
55
ASYO
ASYI
RFI
ADIP
DEMODULATOR/
DECODER
78
ADFG
SPINDLE
SERVO
79
F0CNT
94 93
SPFD SPRD
SUBCODE
PROCESSOR
24
SAMPLING
RATE
CONVERTER
DIGITAL
AUDIO
INTERFACE
22
21
DIN
DOUT
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER, 2M BIT D-RAM
IC301 (1/2)
DADT
INTERNAL BUS
D-RAM
CLOCK
GENERATOR
25 26 27
512FS
BUFFER
IC304
XBCK LRCK
FS256
BCK
LRCK
16
OSCI
512FS
17
OSCO
CPU
INTERFACE
MONITOR
CONTROL
10
XRST
12
DQSY
11
SQSY
14
XINT
9 8 5 6 7
SENS SRDT SWDT SCLK XLAT
LEVEL SHIFT
IC502
5 13 3 1
6 12 4 2
LEVEL SHIFT
IC503
1 2 3 4
MNT0 MNT1 MNT2 MNT3
13
1 3 5
12
2 4 6
FOK SHOCK XBUSY SLOCK
SWDT SCLK XLAT
59 62 55 54 52 45 51 64 26 27 28 29
MNT0 MNT1 MNT2 MNT3
21
LOCK
39
TEMP
MD-RST
SQSY
CC-XINT
SENS
MD-SI
MD-SO
MD-CKO
MD-LAT
7 6
EJECT LOAD
5 4
05
1 7
M
RIN FIN
OUT1 OUT2
LOADING
MOTOR DRIVE
IC305
M903
(LOADING)
63
C-SW
LOADING START/
EJECT END
E-SW LIMIT-IN
(LIMIT)
LOADING
END
ON: When the disc loading start
and the disc eject completion.
ON: When completion of
the disc loading.
ON: When the optical pick-up is
inner position.
31
32
EXTAL
XTAL
X501
10MHz
TH501
66
DEEMP
47, 46, 48, 49
1, 2, 24, 25
D0 – D3
32 – 29, 34 – 38, 43
9 – 12, 14 – 18, 5
A0 – A9
D0 – D3
A00 – A09
41 22
45 3
44 4
42 23
XOE
XWE
XRAS
XCAS
OE
WE
RAS
CAS
D-RAM
IC307
(Page 22)
A
DADT, BCK, LRCK, 512FS
(Page 21)
C
LOCK
(Page 21)
B
EMPHASIS
MD MECHANISM CONTROLLER
IC501 (1/2)
• SIGNAL PATH
: MD PLAY
11 56
EMPHASIS