69
HCD-S500/S800
Pin No.
140
141
142
143
144
145
146
147
148, 149
150
151, 152
153
154 to 157
158
159 to 162
163
164
165
166
167
168
169 to 176
I/O
–
O
O
O
O
O
–
O
O
–
O
–
O
–
O
–
O
I
I
I
I
I
Pin Name
VSIOA3
DCLK
DCKE
XWE
XCAS
XRAS
VDIOA3
NC
A11 -10
VSCA3
A9 - 8
VDCA3
A7 - 4
VSIOA4
A3 - 0
VDIOA4
XSRQ
XSHD
SDCK
XSAK
SDEF
SD0 -7
Description
Ground for I/O
Clock output terminal for SDRAM
Clock enable signal output for SDRAM
Write enable signal output for SDRAM
Column address strobe signal output for SDRAM
Row address strobe signal output for SDRAM
Ground for I/O
Output terminal for test (open)
Address signal output for SDRAM
Ground
Address signal output for SDRAM
Power supply
Address signal output for SDRAM
Ground for I/O
Address signal output for SDRAM
Power supply for I/O
Data request output to the front end processor
Headder flag input from the front end processor
Data transfer clock input from the front end processor
Data effective flag input from the front end processor
Error flag input from the front end processor
Stream data input from the front end processor
Summary of Contents for HCD-S500
Page 36: ...34 34 HCD S500 S800 6 7 SCHEMATIC DIAGRAM DVD 2 8 SECTION IC B D See page 25 for Wavefoms ...
Page 37: ...35 35 HCD S500 S800 6 8 SCHEMATIC DIAGRAM DVD 3 8 SECTION ...
Page 38: ...36 36 HCD S500 S800 6 9 SCHEMATIC DIAGRAM DVD 4 8 SECTION ...
Page 41: ...39 39 HCD S500 S800 6 12 SCHEMATIC DIAGRAM DVD 7 8 SECTION ...
Page 49: ...47 47 HCD S500 S800 6 20 SCHEMATIC DIAGRAM I O SECTION 2 2 See page 25 for Wavefoms ...
Page 52: ...50 50 HCD S500 S800 6 23 PRINTED WIRING BOARD FRONT SECTION I Page 42 K Page 48 ...
Page 53: ...51 51 HCD S500 S800 6 24 SCHEMATIC DIAGRAM FRONT SECTION ...
Page 54: ...52 52 HCD S500 S800 6 25 PRINTED WIRING BOARD POWER SECTION 1 2 ...
Page 101: ...99 HCD S500 S800 MEMO ...
