Sony HCD-S500, Service Manual

Page: 63 / 108

61
HCD-S500/S800
Pin No.
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85 to 100
101
102 to 109
110
111 to 118
119
120
I/O
–
I
I
O
–
O
O
O
O
–
O
–
I
I
I
O
O
O
–
–
–
I
O
I
–
–
O
O
I
O
I/O
–
O
–
O
–
O
Pin Name
VCC
CKSW1
OCSW1
CS0X
CS1X
CS2X
CS3X
CS4X
CS5X
C
CS6X
CS7X
XWAIT
BGRNTX
BRQ
XRD
XWRH
XWRL
XMIX
HSTX
VSS
XFRRST
CPUCK
OCSW2
XDACK
VESCS/X39CS
48/44.1K
WIDE
MAMUTE
XLDON
HD0 -15
VSS
HA0 - 7
VCC
HA8 - 15
VSS
HA16
Description
Power supply
Chucking switch (Tray SW1) signal input
Open/Close switch (Tray SW2) signal input
Chip select signal output to external ROM
Not used
Chip select signal output to AVD SDRAM
Chip select signal output to AVD R-BUS
Chip select signal output to IC302(CXD8635R/ARP)
Chip select signal output to IC302(CXD8635R/SDSP)
Terminal for built-in regulator bypass capacitor
FGA CS output
Not used
external WAIT signal input
External bus open aclnowledge signal input (pull-up)
External bus open request signal input
External bus read enable signal output
Write signal output for upper byte
Write signal output for lower byte
Not used
Not used (pull-up)
Ground
Reset signal input
CPU clock output
Tray switch signal input
Not used (pull-up)
Not used (pull-up)
PLL IC control signal output
Video wide offset control signal output
IFOK signal input from IC901(CPU)
Laser diode mute control signal output
External data bus bits 0 - 15
Ground
Address signal output
Power supply
Address signal output
Ground
Address signal output