75
HCD-GNZ77D/GNZ88D
IC401 M30622MEP-A50FPU0 (SYSTEM CONTROL) (MAIN BOARD (1/4))
Pin No.
Pin Name
I/O
Pin Description
1
SW CHANNEL
O
Signal path selection signal for sub woofer channel
SELECT
“L”: LFE, “H”: Subwoofer out from M61537
2
SURR CHANNEL
O
Signal path selection signal for surround channel
SELECT
“L”: SL/FR (MTK), “H”: Tone out from M61537
3 SM LATCH 3 O Serial data latch pulse output to the S-Master Processor
4
SIRCS
I
Remote control signal input
5
NO USE
I
Not used. (Open)
6
NO USE
I
Not used. (Open)
7
NO USE
I
Not used. (Open)
8
BYTE
—
Ground pin
9
CNVSS
—
Ground pin
10
XC IN
I
Sub system clock input (32.768 kHz)
11
XC OUT
O
Sub system clock output (32.768 kHz)
12
RESET
I
System reset signal input from the reset signal IC “L”: reset After the power
supply rises, “L” is input for several hundreds msec and then change to “H”.
13
X OUT
O
Main system clock output (5 MHz)
14
VSS
—
Ground pin
15
X IN
I
Main system clock input (5 MHz)
16
VCC
—
Power supply pin (+3.3 V)
17
NMI
I
Non-maskable interrupt input
18
NO USE
I
Not used. (Connect to ground.)
19
NO USE
I
Not used. (Open)
20
AC CUT
I
AC off detection signal input from the reset signal IC “L”: AC Cut detected
21
VIDEO MUTE
O
Video muting on/off control signal output “L”: muting on
22
VIDEO OUT SW
O
Composite video output switching output control
“L”: DVD VIDEO output, “H”: VIDEO VIDEO input
23
MIC DETECT
I
Microphone connection detection signal input “L”: headphone connected
24
KRMOD
I
Karaoke Mode detection signal input
25
MIC STATUS
O
Microphone status output to DVD Motherboard
“L”: Microphone is not connected, “H”: Microphone is connected
26
MTK RESET
O
Reset signal output to DVD Motherboard “L”: reset
27
MTK XIFCS
I
Communication Initialization Request Acknowledgement Signal from DVD
Motherboard
O
Communication Initialization Request Signal to DVD Motherboard
I/O
Clock signal for IIC communication between the microcomputer and the IIC checker
I/O
Data signal for IIC communication between the microcomputer and the IIC checker
O
Serial data output signal to DVD Motherboard
I
Serial data input signal from DVD Motherboard
I
Serial data clock signal to DVD Motherboard
O
DVD analog signal muting on/off control signal output “H”: muting on
O
Power supply control signal to DVD Motherboard “H”: Power supply on
O
PLL chip enable signal output to the tuner unit
I
PLL serial data input from the tuner unit
38
ST CLK
O
PLL serial data transfer clock signal output to the tuner unit
39
ST DIN/MC DOUT
O
PLL serial data output to the tuner unit
40
TUNED
I
Tuning detection signal input from the tuner unit “L”: tuned
41
OPEN SW
I
Eject detection signal input from CDM
42
TBL SENSE
I
Disc tray position detection signal input from CDM
43
E3
I
Disc tray status detection signal input from CDM
44
E2
I
Disc tray status detection signal input from CDM
45
E1
I
Disc tray status detection signal input from CDM
46
TM F
O
CDM turning motor control signal output
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