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72
HCD-GN88D
Pin No.
57
58
59, 60
61
62, 63
64
65
66 to 69
70
71
72
73 to 75
76
77
78
79, 80
81
82 to 87
88
89
90
91
92
93
94
95
96, 97
98
99
100
101, 102
103
104 to 106
107
108
109
110
111
112
113, 114
115
116
117
118, 119
120
121
122, 123
124
125
126, 127
I/O
I/O
—
I
—
I
—
I/O
I/O
—
I/O
—
I/O
O
—
O
O
—
O
—
O
—
O
O
O
O
O
I/O
—
I/O
—
I/O
—
I/O
O
—
O
—
O
—
—
I
I
I
—
—
I
—
O
I
I
Pin Name
XPDI
VDDS
HA0, HA2
VSS
HCS0, HCS1
VDD
DASP
MDB0 to MDB3
VSS
MDB4
VDD5V
MDB5 to MDB7
XMWR
VDD
XRAS
MA0, MA1
VSS
MA2 to MA7
VDD
MA8
VSS
MA9/MNT0
MNT1/MNT1
MNT2/MNT2
XMOE
XCAS
MDB8, MDB9
VSS
MDBA
VDD
MDBB, MDBC
VDD5V
MDBD to MDBF
GFS
VSS
APEO
VDD
DASYO
GNDA5
ASF1, AFS2
DASYI
RFDCC
RFIN
VCCA5, VCCA4
VCOR1
VCOIN
GNDA4, GNDA3
LPF5
VC1
LPF2, LPF1
Description
Not used (Pull up)
Power supply (+5V)
Not used (Pull up)
Ground (open)
Not used
Power supply (+3.3V)
Not used
Two-way data bus with the D-RAM
Ground
Two-way data bus with the D-RAM
Power supply (+5V)
Two-way data bus with the D-RAM
Write enable signal output to the D-RAM
Power supply (+3.3V)
Row address strobe signal output to the D-RAM
Address signal output to the D-RAM
Ground
Address signal output to the D-RAM
Power supply (+3.3V)
Address signal output to the D-RAM
Ground
Address signal output to the D-RAM
EEPROM ready signal output to CXP973064
Address signal output to the D-RAM
Output enable signal output to the D-RAM
Column address strobe signal output to the D-RAM
Two-way data bus with the D-RAM
Ground
Two-way data bus with the D-RAM
Power supply (+3.3V)
Two-way data bus with the D-RAM
Power supply (+5V)
Two-way data bus with the D-RAM
Guard frame sync signal output to CXP973064-226R
Ground
Absolute phase error signal output
Power supply (+3.3V)
RF binary signal output
Ground
Filter connected terminal for selection the constant asymmetry compensation
Analog signal input after integrated from the RF binary signal
Input terminal for adjusting DC cut high-pass filter for RF signal
RF signal input from the DVD/CD RF amplifier
Power supply (+3.3V)
VCO oscillating range setting resistor connected
VCO input
Ground
Signal output from the operation amplifier from PLL loop filter
Middle point voltage (+1.65V) input
Inverted signal input to the operation amplifier from PLL loop filter