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70
HCD-GN88D
Description
Pin Name
Pin No.
I/O
158
DAI_BCK
I
BCK signal input from ADC (not used)
159
DAI_LRCK
I
LRCK signal input from ADC (not used)
160
I2C_CL
I/O
I2C clock bus
161
I2C_DA
I/O
I2C data bus
162
CS(ZIVA_E2P)
O
Chip select signal output to the EEPROM (IC204)
163
RXD1
I
Serial data input for check jig
164
TXD1
O
Serial data output for check jig
165
WRITE_CTRL(ZIVA_E2P)
O
Write control signal output to the EEPROM (IC204)
166
GNDP
—
Ground terminal (I/O signal)
167
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
168
SDDATA7
I
SDBus data7 input
169
SDDATA6
I
SDBus data6 input
170
SDDATA5
I
SDBus data5 input
171
SDDATA4
I
SDBus data4 input
172
GND
—
Ground terminal (inside core)
173
VDD
—
Power supply terminal (+1.8V) (inside core)
174
SDDATA3
I
SDBus data3 input
175
SDDATA2
I
SDBus data2 input
176
SDDATA1
I
SDBus data1 input
177
SDDATA0
I
SDBus data0 input
178
SDREQ
O
SDBus data request signal output
179
SDEN
I
SDBus data enable signal input
180
GNDP
—
Ground terminal (I/O signal)
181
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
182
SDERROR
I
SDBus data error signal input
183
SDCLK
I
SDBus data clock input
184
HIRQ1
I
Interrupt signal input from the mechanism controller (IC901)
185
DRVCLK
I
Serial data clock input from the mechanism controller (IC901)
186
DRVTX
I
Serial data input from the mechanism controller (IC901) and the EEPROM (IC204)
187
DRVRX
I
Serial data output to the mechanism controller (IC901) and the EEPROM (IC204)
188
DRVRDY
O
Ready signal input from the mechanism controller (IC901)
189
VNW
—
Power supply for 5V tolerance voltage input
190
ALE
O
Latch enable signal output for address data demux
191
RST_SPC
O
Reset signal output to the mechanism controller (IC901)
192
INT/EXT
O
Input selection signal output for SDBus or ADC (not used)
193
HCS2
O
Chip select signal output for Medusa (not used)
194
HCS1
I/O
Not used
195
HCS0
O
Chip select signal output to the external ROM (IC206)
196
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
197
TRST
I
Reset signal input
198
TDO
O
Data output
199
TDI
I
Data input
200
TMS
I
TMS signal input
201
TCK
I
TCK signal input
202
RESET
I
ZIVA reset input
203
BUS CLK
I/O
Not used
204
GND
—
Ground terminal (inside core)
205
VDD
—
Power supply terminal (+1.8V) (inside core)
206
HA3
I/O
Address bus 3
207
HA2
I/O
Address bus 2
208
GNDP
—
Ground terminal (I/O signal)