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— 26 —
— 25 —
5-3. IC BLOCK DIAGRAMS
— CD SECTION —
IC01 CXA1782BQ
IC03 BA5941FP
+
–
LEVEL SHIFT
+ –
+
–
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
LEVEL SHIFT
+ –
+
–
MUTE
+
–
+
–
LEVEL SHIFT
+ –
+
–
LEVEL SHIFT
+ –
+
–
+
–
15
16
17
18
19
21
20
22
26
25
24
23
+
–
NC
Vcc
Vcc
Vcc
VCC
BIAS IN
IN1B
IN1A
IN2B
IN2A
GND
GND
MUTE
VCC
OUT2A
OUT2B
OUT1A
OUT1B
IN4B
IN4A
IN3B
IN3A
OP OUT
OP IN (–)
OP IN (+)
GND
NC
VCC
OUT3A
OUT3B
OUT4A
OUT4B
DRIVER
DRIVER
GND
MUTE
CONTROL
XRST
T.T(M)
POSI.1
POSI.2
T.T.SW
VDD
STB
CLOK
DATA I
DATA 0
LOADING
M-
LOADING
M+
SENSOR
1
8
2
3
4
5
6
7
16
9
15
T
C
14
13
12
11
10
SERIAL I/O
CONTROL
LATCH
LATCH
LATCH
IC02 TC9173P
36
PHD2
PHD1
PHD
33
LD
32
RF M
31
RF O
30
RF I
29
CP
28
CB
27
CC1
26
CC2
25
FOK
24 SENS
23 C. OUT
22 XRST
21 DATA
20 XLT
19 CLK
18 VCC
17 ISET
16 SL 0
15 SL M
14 SL P
13
12
TA O
TA M
11
FSET
10
TG2
9
TGU
8
SRCH
7
FE M
6
FE O
5
FLB
4
FGD
3
FDFCT
2
FEI
1
FEO
48
VC
47
TDFCT
46
TZC
45
ATSC
44
TEI
43
LPFI
42
TEO
41
VEE
40
EI
39
E
38
F
37
FE BIAS
+
+
–
+
+
–
+
–
+
–
+
–
+
–
+
–
+
+
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
–
+
+
–
–
+
+
–
+
–
+
–
+
–
+
–
APC
–
–
–
–
LEVELS
FOK
MIRR
DFCT
RF IV AMP2
RF IV AMP1
FE AMP
F IV AMP
E IV AMP
TE AMP
FZC COMP
BAL1
BAL2
BAL3
TOG1
TOG2
TOG3
TTL
IIL
IIL
TTL
TTL
IIL
• IIL DATA RESISTOR
• INPUT SHIFT RESISTOR
• ADDRESS DECODER
• OUTPUT DECODER
HPF COMP
LPF COMP
TZC COMP
DFCT
DFCT
TM1
FS4
ATSC
• WINDOW COMP
• FCS PHASE
COMPENSATION
• TRACKING
• PHASE
COMPENSATION
• ISET
FS1
FS2
TM4
TM5
TM6
TM3
TM7
TG2
• F SET
TG1
TM2
+
–
TOG1-3
FS1-4
TG1-2
TM1-7
PS1-4
BAL1-3
35
34
Summary of Contents for HCD-G101
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Page 48: ...HCD G101 1997 08 ...
Page 49: ...HCD G101 2 MEMO ...