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HCD-FX300i
29
RF SIGNAL
PROCESSOR
MEMORY
INTERFACE
MEMORY
1M BIT
EFMIN 1
RFOUT 2
LPF 3
FDO
22
AV
D
D
21
DEFFECT
33
FSEQ
34
DVDD15
38
VVDD3
39
VVSS3
40
C2F
35
DVDD
36
DVSS
37
VVDD1
30
CONT5
31
TEST0
53
CONT0
52
CONT1
51
CONT2
50
INTB1
49
INTB0
48
RESB
47
DO
46
DI
45
CL
44
CE
43
DVSS
42
DVDD
41
DATA
58
DATACK
59
LRSY
60
STREQ
54
STCK
55
STDATA
56
TEST1
57
PCMLRSY
62
PCMBCK
63
PCMDA
TA
64
PCMREQ
65
DVSS
67
DVDD15
66
DVDD
61
DVDD
68
XVSS
71
CONT4
70
LR
VDD
75
XVDD
74
LR
VSS
79
SLCO
80
TDO
23
SLDO
24
SPDO
25
VVSS1
26
PDOUT1
27
PDOUT0
28
PCKIST
29
CONT3
32
AVSS 20
PHLPF 4
AIN 5
CIN 6
BIN 7
DIN 8
SLCISET 9
RFMON 10
VREF 11
JITTC 12
EIN 13
FIN 14
TE 16
TEIN 17
LDD 18
LDS 19
PCNCNT 15
SLICE LEVEL
CONTROL
LOW-PASS
FILTER
CLOCK
GENERATOR
TES, HFL,
DETECT
D/A
CONVERTER
A/D
CONVERTER
CD
PLL
SERVO
CONTROL
SYNCHRONIZATION
DETECTION
EFM
DEMODULATION
AUDIO CONTROL
MUTE/DEEMPHASIS/
ATTENUATION CONTROL/
BASS/TREBLE/
HFC FILTER
MONITOR
SRC
VREF
JITTER
ERROR CORRECTION
DOUT CONTROL
STREAM CONTROL/
AUDIO INPUT
PORT CONTROL
PLL3
INTERPOLATION MUTE
RCHO
78
LRREF
77
LCHO
76
XIN
73
XOUT
72
DOUT
69
8FS DIGITAL FILTER/
1BIT D/A CONVERTER
AUDIO OUTPUT
CONTROL
PCM OUTPUT
CONTROL
MP3, WMA
DECODER
ROM
DECODER
TEXT
DECODER
MCU
INTERFACE
SUBCODE
DECODER
APC
• IC Block Diagrams
– BD73/BD73U Board –
IC101 LC786924NT-US-H
Summary of Contents for HCD-FX300i AEP
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