29
29
HCD-AZ1D
HCD-AZ1D
7-8. SCHEMATIC DIAGRAM — MAIN SECTION (2/4) —
0
0
0.6
16.5
5.1
0(-6.2)
0(-6.2)
1.9(-11.7)
0
2.2(0)
2.2(0)
1.9(-11.9)
2.2(-11)
2.1(-6.6)
1.9(-11.9)
2.1(-6.5)
2.1(-6.5)
0
0
0
0(6.1)
0(6.1)
0(0.4)
0(0.4)
0
0
0(9.6)
0(2.1)
9.8(8.9)
9.8(0)
0(6.8)
0(6.2)
9.8
0.6
0
0.6
0
4.6
-4.5
-4.5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
No mark:FM
( ):REC
-4.5
4.5
9
6
2
1
3
4
6
5
7
8
9
10
13
24
23
21
18
17
16
20
19
15
14
34
33
35
22
MAIN BOARD
(2/4)
LCH
(REC/PB/ERASE)
RCH
ERASE
TAPE
MECHANISM
DECK
REC/PB
HEAD
IC302
SOUND
PROCESSOR
S
S
REC/PB SWITCH
Q329~Q332,
Q326,Q327
SWITCH
SWITCH
SWITCH
Q344~Q347
BIAS OSC
SWITCH
IC301
+5V REG
S
+
10V
MIC
AGND
CN202
3P/2.0
V
V
F
IC201
AMP
IC101
+6V REG
8P
0.018
0.018
10K
10K
10
JR101
0
16
16
0.01
C107
C125
C225
3300P
3300P
C 1 0 0
C 1 0 5
IC101
NJM7806FA
•
See page 45 for Waveform.
•
See page 46 for IC Block Diagram.
Summary of Contents for HCD-AZ1D
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