41
DRN-XM01C2/XM01CK2/XM01H2/
XM01HK2/XM01R2
Pin No.
66
67
68
69
70
71
72
73
74
75 to 77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
O
I
I
O
–
O
–
I
I
I
I
I
I
I
I
–
Pin Name
A19
EEPROM-WP
EEPROM-SCK
EEPROM-SDA
TUNER-DATA
RD
WR
HWR(MUTE)
BACKLIGHT2
P34 - 36
P37
CS0(USBCS)
CS1(SRAMCS)
CS2(FLASHCS)
CS3(ROM_TEST_OUT)
SCK(BACKLIGHT)
SDA(CDEC,SDEC)
SCL(CDEC,SDEC)
INT0(VDET DC-IN)
INTERNAL_ROM
P65
DVCC
TUNER-CLK
DVSS
AN0(KEY-A/D1)
AN1(KEY-A/D2)
AN2(ANT_DET)
AN3
AN4(TUNER-LOCK)
AN5(VDET USB)
AN6
AN7(JOG-B)
VREFH
Description
Address bus (Not used)
EEPROM write protect signal output
EEPROM serial clock signal output
EEPROM serial data signal input or output
Tuner data signal output
Read memory signal output
Write memory signal output
Muting control signal output
Backlight control signal output (H:bright,L:dim)
Not used (open)
Flash BOOT terminal (pull-up)
USB chip select signal output
SRAM chip select signal output
Flash memory chip select signal output
Internal ROM test out (Firmware update)
Backlight control signal output (H:active)
IIC data signal input or output
IIC clock signal output
Voltage detect signal input
Terminal for forced internal ROM mode (L:active)
Not used (open)
Power supply
Tuner clock signal output
Ground
Key input signal from the function key
Key input signal from the function key
Antenna signal detect input
Not used (pull-up)
Tuner lock detect signal input
VBUS voltage detect signal input (not used)
Not used (pull-up)
JOG B signal input
Analog reference voltage (connected to Vcc)