Sony D-VE45, Service Manual

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D-VE45
Pin No. Pin Name I/O Pin Description
78 CLK_SEL (1) I Clock select 1 input (Fixed at “H” in this set)
79 CLK_SEL (2) I Clock select 2 input (Fixed at “H” in this set)
80 VSS — Ground
81 CLK_SEL (3) I Clock select 3 input (Fixed at “L” in this set)
82 VDD3 — Power supply pin (+3.3 V)
83, 84 CLK_SEL (4), (5) O Clock select 4, 5 output (Fixed at “L” in this set)
85 AGND_PLL — Ground (for PLL system)
86 DA_XCK (16.934MHz) I Main reference clock signal (16.9344 MHz=384 fs) from CXD3028R (IC601).
87 AVDD_PLL — Power supply pin (+3.3 V) (for PLL system)
88 PGIO4 I/O Not used. (Open)
89 PGIO5 I/O Not used. (Open)
90 PGIO6 I/O Not used. (Open)
91 PGIO0 I/O Not used. (Open)
92 PGIO8 I/O Not used. (Open)
93 PGIO2/VSYNC/CSYNC O Vertical synchronized signal output (Not used in this set)
94 AVDD_PLL — Power supply pin (+3.3 V) (for PLL system)
95 VID_DAC_CK — Not used. (Fixed at “L” in this set)
96 PROC_CK — Not used. (Open)
97 NC — Not used. (Open)
98 AGND_PLL — Ground (for PLL system)
99 VSS — Ground
100 NC — Not used. (Open)
101 PGIO3/HSYNC I/O Not used in this set. (Open)
102 VDD3 — Power supply pin (+3.3 V)
103 PGIO1/VCK-OUT I/O Not used. (Open)
104 VSS — Ground
105 GCK I Normally, fixed at “L” in this set.
106 VCK_IN (27MHz) I Main clock for video signal processor input from Buffer (27 MHz) (IC705).
107 DA-EMP O Not used. (Open)
108 DA-LRCK O Digital audio L/R sampling clock signal (44.1 kHz) output to CXD3028R (IC601).
109 VDDMAX_OUT O Fix the maximum output voltage (+5 V) certain output
110 DA-DATA O Digital audio data output to CXD3028R (IC601).
111 DA-BCK O Digital audio bit clock signal (2.8224 MHz) output to CXD3028R (IC601).
112 HD-OUT_O O Serial data output to TMP87CM41U (IC803).
113 HRDY_O O Ready signal output to TMP87CM41U (IC803)
114 HINT_O O Interrupt request signal output to TMP87CM41U (IC803).
115 CDG-SCK I/O CD graphics serial clock input/output (Fixed at “L” in this set)
116 VSS — Ground
117 HCK_I I Serial data transfer clock signal input from TMP87CM41U (IC803).
118 VDD3 — Power supply pin (+3.3 V)
119 HD-IN_I I Serial data input from TMP87CM41U (IC803).
120 VDD3 — Power supply pin (+3.3 V)
121 HSEL_I I Command selection signal input from TMP87CM41U (IC803).
122 CDG-SDATA I CD graphics serial data input (Fixed at “L” in this set)
123 CDG-VFSY I CD graphics VFSY input (Fixed at “L” in this set)
124 CDG-SOS1 I CD graphics SOS1 input (Fixed at “L” in this set)
125 – 128 NC — Not used. (Open)
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