CXD5602 User Manual
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SCU_INT1
RO
[2]
0
SCU_INT0
RO
[1]
0
CRG_INT
RO
[0]
0
0x04103444
PMU_WAKE_TRIG1
Reserved
RO
[31:2]
0
Reserved
INT_PMIC_I2CM
RO
[1]
0
Status of Event Detection
1: event is detected
0: event is not detected
UNEXP_PMU
RO
[0]
0
3.2.4.4.3
Clear of Event Detection
Held statuses of Event Detection can be cleared by registers. If you write “1” on the register, clearing process will
begin. When the process is completed, the value returns to “0” automatically. You need not write “0”.
Table General Purpose Input/Output (GPIO)-30 shows registers to clear the status of the Event Detections.
Table General Purpose Input/Output (GPIO)-30 Registers to Clear the Status of the Event Detections
Address
Register
Name
Bit Field
Name
Type
Bit
Initial
Value
Description
0x04103430
PMU_WAKE_TRIG0_CLR
USB_VBUS
RW
[31]
0
Held statuses of
Event Detection can
be cleared by
writing “1”.
USB_VBUS_X
RW
[30]
0
PMIC_INT
RW
[29]
0
SEN_INT
RW
[28]
0
APPGPI5
RW
[27]
0
APPGPI4
RW
[26]
0
APPGPI3
RW
[25]
0
APPGPI2
RW
[24]
0
APPGPI1
RW
[23]
0
APPGPI0
RW
[22]
0
SYSGPI5
RW
[21]
0
SYSGPI4
RW
[20]
0
SYSGPI3
RW
[19]
0
SYSGPI2
RW
[18]
0
SYSGPI1
RW
[17]
0
SYSGPI0
RW
[16]
0
HVDD_DET
RW
[15]
0
HIF_UART_RXD
RW
[14]
0
HIF_SPI_CS_X
RW
[13]
0
HIF_SCL_LOW
RW
[12]
0
HIF_DETECT_I2C_SLAVE
RW
[11]
0
Summary of Contents for CXD5602
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Page 36: ...CXD5602 User Manual 36 1010 2 3 Block Diagram Figure Block Diagram 1 CXD5602 Block Diagram ...
Page 144: ...CXD5602 User Manual 144 1010 GNSS_RAMMODE_SEL 0x3F000FFF SRAM GNSS BB 0 5 ON ...
Page 835: ...CXD5602 User Manual 835 1010 enable disable ...