26
26
CDX-R3300EE
3-9. SCHEMA
TIC DIAGRAM — MAIN SECTION (1/2) — • Refer to page 21 for Common Note on Schematic Diagram and W
aveforms.
• Refer to page 30 for IC Block Diagrams.
Note:
•V
oltage is dc with respect to ground under no-signal
(detuned) condition.
no mark
: FM
()
:
AM
<>
:
CD PLA
Y
(Page 27)
IC B/D
IC B/D
C5
C303
C306
C308
C317
D491
D493
R4
R5
R10
R301
R302
R420
R421
R422
D2
D492
D704
Q3
Q491
Q492
R430
R431
R432
R440
R441
R442
R443
R450
R451
R452
R470
R471
R472
R480
R481
R482
R491
R492
R706
R707
R708
C2
C491
JC701
L700
Q420
Q430
Q440
Q450
Q470
Q480
D301
D302
D303
D304
D305
D306
D307
D308
D309
D310
D311
D312
R709
JC304
C320
C321
C701
JC403
C452
C432
C492
C411
JC1
C6
C8
C3
C481
C471
JC702
C703
C319
C318
JC302
C304
JC300
C301
JC303
JC301
C309
C305
C310
C312
C504
C506
R453
R433
C316
C314
R423
JC400
JC401
JC423
C441
C421
C451
C431
D702
D703
C702
C403
C404
C405
C406
C400
R404
C412
L2
L1
R7
R6
C7
R705
JC402
J1
F901
D701
R701
JC703
R703
R704
R702
J400
IC400
CN700
C996
C995
IC300
C802
C800
C801
C803
Q701
Q702
R9
TU1