Sony CDX-MR60UI, Service Manual

Page: 15 / 42

CDX-M60UI/MR60UI
CDX-M60UI/MR60UI
15 15
4-1. BLOCK DIAGRAM – MAIN Section –
SECTION 4
DIAGRAMS
20
22
11
12
28
8
17
18
3
25
7
19
27
13
24
4
AU_LCH
AU_RCH
TXD(MC-BUS)
RXD(MC-BUS)
WAKE UP
Z_MUTE
CD_ON
CDM_ON
SYS_RST
EJECT_OK
VBUS ON
AU ATT
BU CHECK
MECHA 8.5V
A+3.3V
BU_+3.3V
DR_+6V
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
AUDIO +8.5V
BU_+3.3V
SERVO+3.3V
R-CH
R-CH
7 AUX-L
9 AUX-R
MC RX 59
MC TX 60
WAKE UP 58
Z-MUTE 62
CD_ON 30
CDM_ON 31
EJECT OK
70
RESET
54
SYSRST
29
V-BUS ON
BU +3.3V
88
CLK 61
MD2
51
MD0
53
FLASH EN1 78
VOUT
1
VIN 2
15
D201
4 FMIN1
3 FMIN2 3 TU-L
8 AUX GND
ELECTRONIC VOLUME
IC401
J1
(ANTENNA)
PHASE LOCKED LOOP
(PLL)
IC001
L6
FM MIX
L2
CN201
CD
MECHANISM
UNIT
(MG-101Z)
(1/2)
I2C BUS CONTROLLED
POWER AMP/MULTIPLE
VOLTAGE REGULATOR
IC301
SYSTEM CONTROL
IC501 (1/2)
RESET
IC303
CN701
4 TU-R
5 CD-L
6 CD-R
R-CH (FRONT)
R-CH (REAR)
BATT
R-CH
8
9
18 SCL
19 SDA
14 RSSI 37 VSM
84 DAVN
76 RDS ON
12 MPXIN
13 MPXOUT 16 MPX
11 I2C-SCK
12 I2C-SIO
I2C-SCK
I2C-SIO
15
1 7
INTN
16 XTAL1
15 XTAL2
LOUT
ROUT
J901
L
R
-1
-2
AUX
J901 (1/2)
X1
4MHz
MR60UI
BUS
AUDIO IN
S503
RESET
5
3 OUT-FL+
OUT-FL–
9
7 OUT-RL+
OUT-RL–
27
R-CH
ANT-REM
35 VP
BATT
20 VP1
6 VP2
30 AUDIO+B
31
33 SERVO+3.3V
MECHA+6V
34 PANEL+B
34
32 OUT-FR
27 SACLK
28 SADA
29 SAOUT
OUT-RR
R-CH
31 OUT-SL
13 ZAP BEEP
16 ZAP BEEP
4 I2C SCK
AUDIO +8.5V
SERVO+3.3V
MECHA+6V
PANEL+B
2 I2C SIO
16 BEEP
22 STB
25 DIAG
7
10
12
11
16
1
9
2
4
3
6
37
38 I2C SCK
I2C SIO
I2C-SCK
I2C-SIO
I2C-SCK
I2C-SCK
I2C-SIO
I2C-SIO
I2C-SCK
I2C-SIO
I2C-SCK
I2C-SIO
23 I2C_SCK
72
SACLK
71
SAOUT
38
6
5 SAIN
22 I2C_SIO
27 ATT
75 CD MUTE
98 ZAPPING BEEP
97 BEEP
68 AMPSTB
69 DIAG
83
BU CHECK
12 IN-FL
FL+
FL–
L
R
RL+
RL–
FR+
FR–
RR+
RR–
ANT-REM
BATT
ACC
35 OUT-FL
11 IN-RL 33 OUT-RL
MUTE
Q905
MUTE DRIVE
Q906,907
13 RST
12 BUS IN
11 CLK IN
10 BU CHECK
9 DATA IN
8 DATA OUT
25 ACC IN
ACC DETECT
Q703
+3.3V REG
IC302
MUTE
Q903
29 AMP-REM
5
AMP-REM
14
ILL 63 ILL IN
ILL DETECT
Q702
13
TEL-ATT 26 TEL ATT
TEL-ATT DETECT
Q701
1 AMRFIN
REAR
BUS INTERFACE
IC601
D901
D202
D502
I2C_SIO
I2C_SCK
EEPROM
IC502
FU601
28 BUS ON
37 BU+B B.U+5V
FRONT
R-CH
L
J901 (2/2)
R
-3
-4
-5
-6
AUDIO
OUT
MUTE
Q901
BU+3.3V
BATT
2 BUS-R
1 BUS-L
3 BATT
CLK
RST
DATA I/O
BUS ON
5
6
8
4
2
3
1 4
1
2
2 3
BATT
J601
(BUS CONTROL IN)
TH601
7
6
BATTERY CHECK
Q601,D606,607
9 XTI
10 XTO
VDDA VDDD
BU
+3.3V
X101
8.664MHz
RDS DEMODULATOR
IC101
MECHA +6V
3.3V
6
NCO
3
F WRITE
7
CLK
2
RESET
RX 4
1
5
TX
CN501
FLASH
PROGRAMMING
BU +3.3V
B.U +5V
20 UNI SCK
19
UNISO
18 UNISI
RDS +3.3V
CONTROL SWITCH
Q101,102
CD MUTE
Q201
DISPLAY
SECTION
A
ATT
SUB OUT
(MONO)
FLASH
PROGRAMMING
BUFFER
Q501-503
• Signal Path
• R-CH is omitted due to same as L-CH.
: AM or MW
: CD
: FM
: BUS AUDIO
: AUX
(Page 16)