Sony CDP-XA30ES, Service Manual

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Pin No. Pin Name I/O Function
1 A3 O
2 A4 O
3 A5 O
4 A6 O
5 A7 O
6 A8 O
7 A9 O
8 A10 O
9 A11 O
10 A12 O
11
WE O Write enable signal output to the static RAM (IC352)
12
NC O Not used (open)
13 NC O Not used (open)
14 LED-PLAY O (
LED (D871) drive signal output terminal “H”: LED on
15 LED-PAUSE O P
LED (D872) drive signal output terminal “H”: LED on
16 LED-FILTER O FILTER LED (D873) drive signal output terminal “H”: LED on
17 SPDL-MUTE O Mute signal output to the spindle motor driver (IC102, 104)
18 SHIFT-ON/OFF O Reset signal output to the CXD2562Q-CS (IC302) “L”: reset
19 VOL UP O Volume up control signal output to the volume control motor driver (IC354)
20 VOL DOWN O Volume down control signal output to the volume control motor driver (IC354)
21
BLANK O Blank signal output to the fluorescent indicator tube driver (IC801 to IC803)
22
FL D0 O Serial data output to the fluorescent indicator tube driver (IC803)
23
FL D1 O Serial data output to the fluorescent indicator tube driver (IC802)
24
FL D2 O Serial data output to the fluorescent indicator tube driver (IC801)
25
FL CLK O Serial data transfer clock signal output to the fluorescent indicator tube driver (IC801 to IC803)
26
FL WR O Read/write select signal output to the fluorescent indicator tube driver (IC801 to IC803)
27 SENSER SW O
On/off control signal output to the stabilizer detect sensor (IC361) “H”: on
28 SENSER I Detect signal input from the stabilizer detect sensor (IC361) “H”: on
29
LIMIT OUT I
Detection input from the sled limit-out detect switch
The optical pick-up is outer position when “L” Not used (fixed at “L”)
30
RESET I
System reset signal input from the reset signal generator (IC206) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31 XTALI I Main system clock input terminal (4 MHz)
32 XTALO O Main system clock output terminal (4 MHz)
33 VSS — Ground terminal
34
TX O Sub system clock output terminal Not used (open)
35
TEX I Sub system clock input terminal Not used (fixed at “L”)
36
AVSS — Ground terminal (for A/D converter)
37
AVREF I Reference voltage input terminal (+5V)
38 ADJ/AFADJ I Setting terminal for the test mode “L” active
39
K0 I Key input terminal (A/D input) (fixed at “H”)
40
K1 I
Key input terminal (A/D input)
P MODE, TIME keys (S819S820) input
41 K2 I
Key input terminal (A/D input)
ERASE, CHECK, CLEAR, FILTER,
0
,
)
, keys (S801 to S806) input
Address signal output to the static RAM (IC352)
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BD BOARD IC351 CXP84124-068Q (SYSTEM CONTROL)