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4-7
CA-755/755P
IC
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
V (+5V)
DD
GND
A-GND
GND
SIGNAL
I/O
No.
PIN
PIN
No.
I/O
SIGNAL
PIN
No.
I/O
SIGNAL
PIN
No.
I/O
SIGNAL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
C-MOS 8-BIT MICROCOMPUTER
- TOP VIEW -
AV (+5V)
DD
I/O
I/O
I
I
I/O
I
I/O
–
I
–
–
I
I
I
I
I
I
I
I
I
–
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
–
I/O
I/O
I/O
I/O
I/O
I/O
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0/TxD
PC1/RxD
PC2/SCK
PC3/INT2/TI
PC4/TO
PC5/CI
PC6/CO0
PC7/CO1
NMI
INT1
MODE1
RESET
MODE0
X2
X1
GND
A-GND
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
RD
WR
ALE
PF0/AB8
PF1/AB9
PF2/AB10
PF3/AB11
PF4/AB12
PF5/AB13
PF6/AB14
PF7/AB15
PD0/AD0
PF1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
STOP
PA0
PA1
PA2
PA3
PA4
PA5
V
DD
AV
DD
V
AREF
(AV , V =+5V)
DD
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
X1
25
24
X2
OSC
SERIAL I/O
PC1/RxD
12
11
PC0/TxD
13
PC2/SCK
19
NMI
20
INT1
INT
CONTROL
8
8
TIMER
8
14
PC3/INT2/TI
15
PC4/TO
TIMER/EVENT
18
16
17
PC5/CI
PC6/CO0
PC7/CO1
COUNTER
8
4
28-35
AN7-0
36
AREF
37
DD
27
A-GND
V
AV
A/D
CONVERTER
8
58
26
GND
DD
V
LATCH
INC/DEC
PC
SP
EA
V
B
D
H
V'
B'
D'
H'
EA'
BUFFER
A
C
E
L
L'
E'
C'
A'
MAIN G. R
ALT G. R
8/16
PROGRAM
MEMORY
(16k-BYTE)
(256-BYTE)
MEMORY
DATA
8
INTERNAL DATA BUS
6
PSW
LATCH
LATCH
16
16
ALU
(8/16)
16
16
6
16
INST. REG
INST.
DECODER
8
SYSTEM
CONTROL
CONTROL
READ/WRITE
CONTROL
STAND BY
38
RD
39
WR
ALE
40
21
MODE1
23
MODE0 RESET
57
STOP
8
PORT F
8
8
PORT D
8
8
8
41-48
PF7-0/AB15-8
PF7-0/AD7-0
49-56
8
PC7-0
11-18
8
PB7-0
3-10
8
PA7-0
1, 2
8
59-64
PORT C
8
8
PORT B
8
PORT A
16
8
16
12
8
22
CXD1133Q-321 (NEC)
X1
X2
STOP
PC0/TxD
PC1/RxD
PC2/SCK
PC3/INT2/TI
PC4/TO
PC5/CI
PC6/CO0
PC7/CO1
NMI
INT1
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
V
A-V
A-GND
RESET
MODE 0
MODE 1
25
24
57
11
12
13
14
15
16
17
18
19
20
28
29
30
31
32
33
34
35
36
37
27
22
23
21
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
AD0/PD0
AD1/PD1
AD2/PD2
AD3/PD3
AD4/PD4
AD5/PD5
AD6/PD6
AD7/PD7
AB8/PF0
AB9/PF1
AB10/PF2
AB11/PF3
AB12/PF4
AB13/PF5
AB14/PF6
AB15/PF7
ALE
WR
RD
59
60
61
62
63
64
1
2
3
4
5
6
7
8
9
10
49
50
51
52
53
54
55
56
41
42
43
44
45
46
47
48
40
39
38
AREF
DD
INPUT
AN0-7
CI
INT 1
INT 2
NMI
RESET
RxD
STOP
TI
V
X1, 2
OUTPUT
AB8-15
ALE
CO0, 1
RD
TO
TxD
WR
INPUT/OUTPUT
AD0-7
MODE 0, 1
PA0-7
PB0-7
PC0-7
PD0-7
PF0-7
SCK
; SERIAL CLOCK
; PORT F
; PORT D
; PORT C
; PORT B
; PORT A
; ADDRESS/DATA BUS
; WRITE STROBE
; TRANSMIT DATA
; TIMER
; READ STROBE
; COUNTER 0, 1
; ADDRESS LATCH ENABLE
; ADDRESS BUS
; EXTERNAL CRYSTAL, X1; SYSTEM CLOCK INPUT
; REFERENCE VOLTAGE
; TIMER
; SYSTEM STOP
; RECEIVE DATA
; SYSTEM RESET
; NON-MASKABLE INTERRUPT REQUEST
; MASKABLE INTERRUPT REQUEST 2
; MASKABLE INTERRUPT REQUEST 1
; COUNTER
; ANALOG DATA
AREF
; MEMORY MODE
Summary of Contents for CA-755
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Page 98: ...5 6 CA 755 755P 5 6 RX 37 Block Diagram Block Diagram RX 37 RX 37 CA 755 CA 755P ...
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Page 111: ...7 1 CA 755 755P 7 1 2 3 4 5 1 I J K L M N O P Section 7 Schematic Diagrams ...
Page 126: ...7 16 CA 755 755P 7 16 2 3 4 5 A B C D E F G H 1 ...
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