GR47/48 Design Guidelines
BA/SEM/MS 03:0015 Rev A
LZT 123 7596
18
3.7 Interfacing to a 3.3V
µ
Processor
CMOS gates are used within the GR47 and therefore the output drive is
virtually rail to rail for small loads. So direct interface from the GR47
to low voltage logic gates is possible.
Expect V
OHmin
= 2.5V for small loads (100
µ
A).
Level shifting is required when driving into the GR47. This can be
achieved using a simple resistive divider or a diode/resistor
combination (see figure 3.4).
Figure 3.4 : Example of level shifting techniques
The diode based level shifter is the preferred option as it ensures the
GR47 module cannot experience over voltage conditions whilst turned
on and cannot be driven when the module is turned off, but the external
circuitry remains powered. This circuit introduces some skew to the
signal therefore care must be taken choosing the resistor value to match
the data rate.
The resistive level shifter will subject the GR47 to 0.3V over voltage
for worst case supply of 3.6V (3V3+10%), which is acceptable. When
the module is turned off, but the external circuitry remains powered,
current will be driven into the module. This situation should be
avoided. The circuit introduces uniform skew to the signal, however it
does add to the standby current for signals which are normally high.
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