SN8F2270B Series
USB 2.0 Low-Speed 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 92
Version 1.3
0 = disable USB endpoint 1 function.
1 = enable USB endpoint 1 function.
9.5.9 USB ENDPOINT 2 ENABLE REGISTER
The communication with the USB host using endpoint 2, endpoint 2’s FIFO is implemented as 16 bytes of dedicated
RAM. The endpoint 2 is an interrupt endpoint.
098H
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
UE2R UE2E UE2M1
UE2M0 UE2D UE2C3 UE2C2 UE2C1 UE2C0
Read/Write R/W
R/W
R/W R/W R/W R/W R/W R/W
After
reset
0 0 0 0 0 0 0 0
Bit [3:0]
UE2C [3:0]:
Indicate the number of data bytes in a transaction: For IN transactions, firmware loads the
count with the number of bytes to be transmitted to the host from the endpoint 2 FIFO.
Bit 4
UE2D:
The IN/OUT direction enable bit.
0 = EP2 only handshake with IN token.
1 = EP2 only handshake with OUT token.
Bit [6:5]
UE2M
[1:0]:
The endpoint 2 modes determine how the SIE responds to USB traffic that the host sends to
the endpoint 2. For example, if the endpoint 2’s mode bit is set to 00 that is NAK IN/OUT mode as shown in
Table,
The USB SIE will send NAK handshakes in response to any IN/OUT token set to the endpoint 2. The
bit 5 UE2M0 will auto reset to zero when the ACK transaction complete.
USB endpoint 2’s mode table
UE2M1
UE2M0
IN/OUT Token Handshake
0 0
NAK
0 1
ACK
1 0
STALL
1 1
STALL
Bit 7
UE2E:
USB endpoint 2 function enable bit.
0 = disable USB endpoint 2 function.
1 = enable USB endpoint 2 function.
9.5.10 USB DATA POINTER REGISTER
USB FIFO address pointer. Use the point to set the FIFO address for reading data from USB FIFO and writing data to
USB FIFO.
