75DRV2
12
1-2 MAINBOARD LAYOUT
Using non-compliant memory with higher bus clock (over clocking) may
severely compromise the integrity of system.
1 3
1 3
USB2
1
16
1
16
USB3
CNR 1
FLASH BIOS
USB0
USB1
PS/2
MOUSE
PS/2
K/B
LPT1
COM1
COM2
GAME/MIDI PORT
MIC
SW1
ON
DIP
5 4 3 2 1
SW2
ON
DIP
6 5 4 3 2 1
CN1
ON
DIP
1 2 3 4 5
SW3
FAN1
1 3
FAN3
1 3
CON1
SAPK
RST
PLED
SLED
HDD/LED
IR
PWR
S
USPEND
++
--
+
-
16 30
1 15
RT2
SCR1
JBAT1
1 3
JP1
JP2
1 3
1 3
WOL1
1 3
JCD_IN1
1 3
JP17
PCI 1
PCI 2
PCI 3
PCI 4
PCI 5
SSF1
ZD1
DDR 266
AGP PRO 4X
FDC1
IDE1
IDE2
VIA
VT8233
AC'97
Codec
LPC I/O
Controller
VIA
VT8366A
Li
Battery
FAN2
Clock
Generator
F
AN4
LINE
OUT
LINE
IN
JP18
JP19
1 3
1 3
SOCKET A
RT1
1 4
Summary of Contents for SL-75DRV2
Page 1: ...R T h e S o u l O f C o m p u t e r T e c h n o l o g y SL 75DRV2 USER MANUAL v1 0 ...
Page 14: ...14 75DRV2 MEMO MEMO ...
Page 39: ...39 Chapter 2 Hardware Setup MEMO MEMO ...
Page 47: ...47 Chapter 3 Software Setup MEMO MEMO ...
Page 52: ...75DRV2 52 Award Flash Memory Writer Start Screen Award Flash Memory Writer Complete Screen ...
Page 89: ...Chapter 4 BIOS Setup 89 MEMO MEMO ...
Page 100: ...75DRV2 100 MEMO MEMO ...