Solid State Logic Alpha-Link AX, User Manual

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Appendix A – AES/EBU Interface
Inputs with Sample Rate Conversion
The inputs of AES/EBU port A (channels 1 through 8) have sample rate conversion available. These sample rate
converters combine a wide input-to-output sampling ratio with outstanding dynamic range and ultra low distortion,
resulting in high quality even at a 1:1 conversion (where many SRCs offer their lowest quality). In many instances the
converters may be left in-circuit albeit at the expense of increased delay through these inputs. If required, the sample
rate converters can be bypassed, in pairs, as described in the System Settings and Diagnostics section of this guide.
Input Sample Rate and Auxiliary Data
The input sample rate is measured from the selected AES/EBU stereo pair on port A (see page 17), not extracted from
the in-coming channel status bits. Information about ‘Legacy’ or ‘High Speed’ mode may be extracted from the channel
status bits if the in-coming stream contains this information but this should not be relied upon (see page 15).
Inputs without Sample Rate Conversion
The inputs of AES/EBU ports B and C (channels 9 through 24) do not have sample rate converters. Any signals applied
to these inputs (and port A if the sample rate converters are bypassed) must be synchronized to the system.
Output Auxiliary Data
The following will be set in the auxillary data fields of all AES/EBU output streams:
Channel Status Data Indication of the selected sample rate and mode (‘Legacy’ or ‘High Speed’)
All other channel status fields default to ‘1’
User Data Bit Always set low (‘0’)
Validity bit Always set true (valid)
Parity Bit Always recalculated