Architecture Description
rev 2.0
SFPCI -VME SERIES User’s Guide and Installation Manual
24
3.4 DMA Controller
The Universe provides an internal DMA controller for high performance data transfer
between the PCI and VMEbus. DMA operations between the source and destination bus
are decoupled through the use of a single bidirectional FIFO (DMAFIFO). Parameters
for the DMA transfer are software configurable in the Universe registers.
The principle mechanism for DMA transfers is the same for operations in either
direction (PCI to VME, or VME to PCI), only the relative identity of the source and
destination bus changes. In a DMA transfer, the Universe gains control of the source bus
and reads data into its DMAFIFO. Following specific rules of DMAFIFO operation, it
then acquires the destination bus and writes data from its DMAFIFO.
The DMA controller can be programmed to perform multiple blocks of transfers using
entries in a linked-list. The DMA will work through the transfers in the linked-list
following pointers at the end of each linked-list entry. Linked-list operation is initiated
through a pointer in an internal Universe register, but the inked-list itself resides in PCI
bus memory.