Byte Swapping Capability
rev 2.0
SFPCI -VME SERIES User’s Guide and Installation Manual
42
CHAPTER 6
Byte Swapping Capability
6.1 General
The SF_VME board rev. F is a new member of the Solflower SFPCI-VME Adaptor
series. It implements hardware byte swapping function to solve the problems inherent in
joining Big and Little Endian buses. The SF_VME rev F is physically and electrically
backward compatible with the older (rev D & E) revisions. The SFPCI-VME Bridge can
be upgraded by simply replacing the VME card in the VME crate while PCI card and
cable remain the same. Like its predecessors, SF_VME rev F needs to be installed in
slot 1 in the VME crate in order to be a system controller, and fully function its byte
swapping capability.
When byte swapping is disabled (by default), the SF_VME rev. F board acts like a
SF_VME rev E or rev D board. This mode is used for Solaris system environment
where data paths don't need to be swapped. The SF_VME rev. F board incorporates a
Xilinx CPLD XC95xx. All the logics for byte swapping are implemented in XC95xx.
Byte swapping function can be overwritten by on-board hardware jumper. All the byte
swapping signals including DS1*, DS0*, A1, LW* and the controls of the byte lanes
come from XC95xx. There will be three VME A16 addresses for byte swapping
module’s register space: one for byte swapping command, one for status, and one for ID
register. Command register sets up the byte swapping capability. Status register
indicates the current status of the board. The content of the ID register indicates board
revision. An A16 address for byte swapping can be set in the range CF00 to FF00, and is
configurable with jumpers. (In fact, byte swapping address can be programmed in
Solflower factory to any address space within 0x0000 to 0xFFFF.) Currently the default
address is set to FF00. Command register is read/writable while status and ID register
only allow reading. The address for command register is *F00 where (*) is configurable
from C to F with jumpers. Similarly, address for status and ID registers are *F02, *F04
respectively. For more detail about jumper configurations, please refer to figure 14 to
figure 17. The following table describes the contents and functions of command
register. Byte swapping currently is not supported for D64, and Unaligned transfer.
TABLE 14
Byte Swapping Command Register
command[7:0]
function
00001000
no swapping (power-up default)
00000xx1
enable byte swapping for byte
00000x10
enable byte swapping for word
000001xx
enable byte swapping for long word
00000111
enable all swapping (byte, word, long
word)